XC2S600E-6FGG456C Xilinx Inc, XC2S600E-6FGG456C Datasheet - Page 67
XC2S600E-6FGG456C
Manufacturer Part Number
XC2S600E-6FGG456C
Description
FPGA Spartan®-IIE Family 600K Gates 15552 Cells 357MHz 0.15um Technology 1.8V 456-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-IIEr
Datasheet
1.XC2S50E-6TQG144C.pdf
(108 pages)
Specifications of XC2S600E-6FGG456C
Package
456FBGA
Family Name
Spartan®-IIE
Device Logic Cells
15552
Device Logic Units
3456
Device System Gates
600000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
329
Ram Bits
294912
Number Of Logic Elements/cells
15552
Number Of Labs/clbs
3456
Total Ram Bits
294912
Number Of I /o
329
Number Of Gates
600000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
456-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1332
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2S600E-6FGG456C
Manufacturer:
XILINX
Quantity:
760
Company:
Part Number:
XC2S600E-6FGG456C
Manufacturer:
XILINX
Quantity:
455
Company:
Part Number:
XC2S600E-6FGG456C
Manufacturer:
Xilinx Inc
Quantity:
10 000
FT256 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E, XC2S400E)
(Continued)
DS077-4 (2.3) June 18, 2008
Product Specification
I/O, L65P
I/O, VREF
Bank 6, L65N
I/O, L64P_YY
I/O, L64N_YY
I/O, L63P
I/O, L63N
I/O, L62P_YY
I/O, L62N_YY
M1
M0
M2
I/O, L61N_YY
I/O, L61P_YY
I/O, L60N
I/O, L60P
I/O, L59N_YY
I/O, L59P_YY
I/O, VREF
Bank 5,
L58N_YY
I/O, L58P_YY
I/O, L57N
Function
Pad Name
R
Bank
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
5
5
-
-
-
Pin
M3
M4
N2
N3
R1
R3
R4
N5
R5
N6
P1
P2
T2
P4
T3
T4
P5
T5
L4
L5
150E, 200E,
150E, 200E,
100E, 200E,
100E, 200E,
100E, 150E,
300E, 400E
300E, 400E
XC2S100E,
200E, 300E
XC2S100E,
200E, 300E
300E, 400E
300E, 400E
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
Async.
Output
Option
LVDS
300E
All
All
All
All
All
All
All
All
All
All
-
-
-
XC2S200E,
300E, 400E
XC2S200E,
300E, 400E
Option
V
All
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
FT256 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E, XC2S400E)
(Continued)
I/O, L57P
I/O, L56N
I/O, L56P
I/O, L55N
I/O, L55P
I/O
I/O, L54N
I/O, L54P
I/O, VREF
Bank 5, L53N
I/O, L53P
I/O
I/O (DLL),
L52N
GCK1, I
GCK0, I
I/O (DLL),
L52P
I/O, L51N
Function
Pad Name
Spartan-IIE FPGA Family: Pinout Tables
Bank
5
5
5
5
5
5
5
5
5
5
5
5
5
4
4
4
Pin
M6
M7
P6
R6
N7
P7
R7
N8
P8
R8
R9
P9
T6
T7
T8
T9
100E, 150E,
100E, 200E,
100E, 200E,
100E, 200E,
100E, 200E,
200E, 300E,
200E, 300E,
200E, 300E,
200E, 300E,
150E, 200E,
300E, 400E
300E, 400E
300E, 400E
300E, 400E
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
XC2S50E,
Async.
Output
Option
LVDS
300E
400E
400E
400E
400E
400E
-
-
-
-
-
-
150E, 200E,
XC2S100E,
300E, 400E
XC2S400E
XC2S400E
Option
V
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
67