XC2C64A-5VQG44C Xilinx Inc, XC2C64A-5VQG44C Datasheet - Page 14

• Manufacturer Part Number: XC2C64A-5VQG44C
• Description: CPLD CoolRunner™-II Family 1.5K Gates 64 Macro Cells 263MHz 0.18um (CMOS) Technology 1.8V 44-Pin VTQFP
• Manufacturer: Xilinx Inc
• Series: CoolRunner IIr

Specifications of XC2C64A-5VQG44C

• Package: 44VTQFP
• Family Name: CoolRunner™-II
• Device System Gates: 1500
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 5 ns
• Number Of User I/os: 33
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 1.8 V
• Maximum Operating Frequency: 263 MHz
• Number Of Product Terms Per Macro: 40
• Operating Temperature: 0 to 70 °C
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.6ns
• Voltage Supply - Internal: 1.7 V ~ 1.9 V
• Number Of Logic Elements/blocks: 4
• Number Of Macrocells: 64
• Number Of Gates: 1500
• Number Of I /o: 33
• Mounting Type: Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Features: Programmable
• Voltage: 1.8V
• Memory Type: CMOS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1536 - KIT STARTER SPARTAN-3E122-1532 - KIT DEVELOPMENT SPARTAN 3ADSP
• Number Of Logic Elements/cells: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1420

XC2C64A CoolRunner-II CPLD
Package Pinout Diagrams
14
Figure 7: PC44 Package (Obsolete package shown for
V
CCIO1
V
I/O
GND
TMS
TCK
CCIO1
TDI
GND
I/O
TMS
I/O
I/O
I/O
I/O
I/O
TCK
TDI
(2)
I/O
I/O
I/O
I/O
I/O
(2)
1
2
3
4
5
6
7
8
9
10
11
7
8
9
10
11
12
13
14
15
16
17
Figure 6: VQ44 Package
legacy support only)
Top View
Top View
VQ44
PC44
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
33
32
31
30
29
28
27
26
25
24
23
39
38
37
36
35
34
33
32
31
30
29
I/O
I/O
I/O
I/O
I/O
I/O
I/O
V
GND
TDO
I/O
CCIO2
I/O
I/O
I/O
I/O
I/O
I/O
I/O
V
Gnd
TDO
I/O
(1)
(1)
(1)
(3)
CCIO2
(1)
(1)
(1)
(3)
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K
J
H
G
F
E
D
C
B
A
I/O(1)
I/O(1)
VAUX
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O(2)
I/O(2)
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
2
3
4
5
6
7
8
9
10
11
12
(2)
(2)
(1)
(1)
(3)
I/O
I/O
(2)
(1)
Figure 8: QFG48 Package
Top View
Figure 9: CP56 Package
V
I/O
QFG48
I/O
I/O
I/O
I/O
I/O
I/O
AUX
(1)
GND
I/O
I/O
I/O
Bottom View
I/O
I/O
I/O
I/O
CP56
DS311 (v2.3) November 19, 2008
V
V
TDO
I/O
CCIO1
CCIO2
GND
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
I/O
I/O
I/O
Product Specification
36
35
34
33
32
31
30
29
28
27
26
25
GND
V
I/O
I/O
I/O
I/O
I/O
I/O
CC
I/O
I/O
I/O
I/O
I/O
Gnd
I/O
Vcc
I/O
I/O
I/O
I/O
TMS
I/O
TCK
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
R