LC4064ZC-75TN100C LATTICE SEMICONDUCTOR, LC4064ZC-75TN100C Datasheet - Page 41
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LC4064ZC-75TN100C
Manufacturer Part Number
LC4064ZC-75TN100C
Description
CPLD ispMACH® 4000Z Family 64 Macro Cells 168MHz EECMOS Technology 1.8V 100-Pin TQFP
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LC4032V-75TN44C.pdf
(99 pages)
Specifications of LC4064ZC-75TN100C
Package
100TQFP
Family Name
ispMACH® 4000Z
Maximum Propagation Delay Time
7.5 ns
Number Of User I/os
64
Number Of Logic Blocks/elements
36
Typical Operating Supply Voltage
1.8 V
Maximum Operating Frequency
168 MHz
Number Of Product Terms Per Macro
80
Memory Type
EEPROM
Operating Temperature
0 to 90 °C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LC4064ZC-75TN100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Switching Test Conditions
Figure 12 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 11.
Figure 12. Output Test Load, LVTTL and LVCMOS Standards
Table 11. Test Fixture Required Components
LVCMOS I/O, (L -> H, H -> L)
LVCMOS I/O (Z -> H)
LVCMOS I/O (Z -> L)
LVCMOS I/O (H -> Z)
LVCMOS I/O (L -> Z)
1. C
L
includes test fixtures and probe capacitance.
Test Condition
DUT
106 106
106
106
R
1
106
106
R
2
V
R 1
R 2
41
CCO
35pF
35pF
35pF
5pF
5pF
C
L
ispMACH 4000V/B/C/Z Family Data Sheet
1
C L
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
1.5V
1.5V
V
V
OH
OL
+ 0.3
- 0.3
0213A/ispm4k
Timing Ref.
Point
Test
CCO
CCO
/2
/2
LVCMOS 3.3 = 3.0V
LVCMOS 2.5 = 2.3V
LVCMOS 1.8 = 1.65V
3.0V
3.0V
3.0V
3.0V
V
CCO
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