72271LA15TF Integrated Device Technology (Idt), 72271LA15TF Datasheet - Page 20

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72271LA15TF

Manufacturer Part Number
72271LA15TF
Description
FIFO Mem Sync Dual Depth/Width Uni-Dir 32K x 9 64-Pin STQFP
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 72271LA15TF

Package
64STQFP
Configuration
Dual
Bus Directional
Uni-Directional
Density
288 Kb
Organization
32Kx9
Data Bus Width
9 Bit
Timing Type
Synchronous
Expansion Type
Depth|Width
Typical Operating Supply Voltage
5 V
Operating Temperature
0 to 70 °C
NOTES:
1. Retransmit setup is complete after EF returns HIGH, only then can a read operation begin.
2. OE = LOW.
3. W
4. No more than D - 2 may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure.
5. EF goes HIGH at 60 ns + 1 RCLK cycle + t
IDT72261LA/72271LA SuperSync FIFO™
16,384 x 9 and 32,768 x 9
Q
D = 16,384 for the IDT72261LA and 32,768 for the IDT72271LA.
WCLK
RCLK
0
WEN
1
= first word written to the FIFO after Master Reset, W
REN
PAE
PAF
- Q
HF
EF
RT
n
t
ENS
W
x
t
t
A
ENH
REF
t
ENS
t
RTS
.
t
RTS
Figure 11. Retransmit Timing (IDT Standard Mode)
2
= second word written to the FIFO after Master Reset.
t
t
t
ENH
REF
HF
t
SKEW4
1
W
x+1
20
2
t
PAF
1
t
ENS
2
t
t
t
A
REF
PAE
COMMERCIAL AND INDUSTRIAL
(5)
TEMPERATURE RANGES
W
1
(3)
JANUARY 7, 2009
4671 drw14
t
t
A
ENH
W
2
(3)

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