72265LA15PFI Integrated Device Technology (Idt), 72265LA15PFI Datasheet - Page 11

• Manufacturer Part Number: 72265LA15PFI
• Description: FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 18 64-Pin TQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 72265LA15PFI

• Package: 64TQFP
• Configuration: Dual
• Bus Directional: Uni-Directional
• Density: 288 Kb
• Organization: 16Kx18
• Data Bus Width: 18 Bit
• Timing Type: Synchronous
• Expansion Type: Depth|Width
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: -40 to 85 °C

enable the rising edge of RCLK. See Figure 12, Retransmit Timing (FWFT
Mode), for the relevant timing diagram.
HF and PAF flags begin with the rising edge of RCLK that RT is setup.
PAE is synchronized to RCLK, thus on the second rising edge of RCLK
IDT72255LA/72265LA CMOS SuperSync FIFO™
8,192 x 18 and 16,384 x 18
For either IDT Standard mode or FWFT mode, updating of the PAE,
11
after RT is setup, the PAE flag will be updated. HF is asynchronous, thus
the rising edge of RCLK that RT is setup will update HF. PAF is synchro-
nized to WCLK, thus the second rising edge of WCLK that occurs t
after the rising edge of RCLK that RT is setup will update PAF. RT is
synchronized to RCLK.
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
JANUARY 13, 2009
SKEW