72V2113L10PFI Integrated Device Technology (Idt), 72V2113L10PFI Datasheet - Page 10
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72V2113L10PFI
Manufacturer Part Number
72V2113L10PFI
Description
FIFO Mem Sync Dual Depth/Width Uni-Dir 256K x 18/512K x 9 80-Pin TQFP
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.72V2113L10PFI.pdf
(46 pages)
Specifications of 72V2113L10PFI
Package
80TQFP
Configuration
Dual
Bus Directional
Uni-Directional
Density
4.5 Mb
Organization
256Kx18|512Kx9
Data Bus Width
18|9 Bit
Timing Type
Synchronous
Expansion Type
Depth|Width
Typical Operating Supply Voltage
3.3 V
Operating Temperature
-40 to 85 °C
AC ELECTRICAL CHARACTERISTICS
(Commercial: V
NOTES:
1. All AC timings apply to both Standard IDT mode and First Word Fall Through mode.
2. Pulse widths less than minimum values are not allowed.
3. Values guaranteed by design, not currently tested.
4. Parameters apply to the BGA package only.
IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9
Symbol
f
t
t
t
t
t
t
t
t
t
CYC
CYH
CYL
A
AA
RPE
FFA
EFA
PAFA
PAEA
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
Cycle Frequency (Asynchronous mode)
Data Access Time
Cycle Time
Cycle HIGH Time
Cycle LOW Time
Read Pulse after EF HIGH
Clock to Asynchronous FF
Clock to Asynchronous EF
Clock to Asynchronous Programmable Almost-Full Flag
Clock to Asynchronous Programmable Almost-Empty Flag
CC
= 3.3V ± 0.15V, T
Parameter
A
= 0°C to +70°C;Industrial: V
TM
NARROW BUS FIFO
CC
= 3.3V ± 0.15V, T
(1)
TM
NARROW BUS FIFO
— ASYNCHRONOUS TIMING
10
A
= -40°C to +85°C; JEDEC JESD8-A compliant)
Min.
IDT72V2103L6
IDT72V2113L6
0.6
4.5
4.5
—
10
—
—
—
—
Commercial
8
Max.
100
—
—
—
—
8
8
8
8
8
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V2103L7-5
IDT72V2113L7-5
0.6
Min.
—
12
10
—
—
—
—
Com’l & Ind’l
5
5
JUNE 1, 2010
Max.
83
10
—
—
—
—
10
10
10
10
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns