MT48LC4M16A2P-7E:G Micron Technology Inc, MT48LC4M16A2P-7E:G Datasheet - Page 53

• Manufacturer Part Number: MT48LC4M16A2P-7E:G
• Description: DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin TSOP-II Tray
• Manufacturer: Micron Technology Inc
• Type: SDRAMr
• Series: -r

Specifications of MT48LC4M16A2P-7E:G

• Density: 64 Mb
• Maximum Clock Rate: 143 MHz
• Package: 54TSOP-II
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 5.4 ns
• Operating Temperature: 0 to 70 °C
• Organization: 4Mx16
• Address Bus: 14b
• Access Time (max): 5.4ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 150mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 64M (4M x 16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 54-TSOP (0.400", 10.16mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 36:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
DQML, DQMH
Power-Down Mode
COMMAND
A0–A9, A11
Precharge all
DQM /
BA0, BA1
active banks
Notes:
CLK
CKE
A10
DQ
High-Z
t CKS
t CMS
t AS
SINGLE BANK
PRECHARGE
ALL BANKS
BANK(S)
1. Violating refresh requirements during power-down may result in a loss of data.
T0
t CMH
t CKH
t AH
Two clock cycles
All banks idle, enter
power-down mode
t CK
T1
NOP
t CKS
t CL
T2
NOP
Input buffers gated off while in
power-down mode
t CH
53
Exit power-down mode
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CKS
Tn + 1
NOP
All banks idle
64Mb: x4, x8, x16 SDRAM
©2000 Micron Technology, Inc. All rights reserved.
Tn + 2
ACTIVE
ROW
ROW
BANK
DON’T CARE
Timing Diagrams