MT46V64M8BN-6:F Micron Technology Inc, MT46V64M8BN-6:F Datasheet - Page 53

DRAM Chip DDR SDRAM 512M-Bit 64Mx8 2.5V 60-Pin FBGA Tray

MT46V64M8BN-6:F

Manufacturer Part Number
MT46V64M8BN-6:F
Description
DRAM Chip DDR SDRAM 512M-Bit 64Mx8 2.5V 60-Pin FBGA Tray
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46V64M8BN-6:F

Density
512 Mb
Maximum Clock Rate
333 MHz
Package
60FBGA
Address Bus Width
15 Bit
Operating Supply Voltage
2.5 V
Maximum Random Access Time
0.7 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
512M (64M x 8)
Speed
6ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Package / Case
60-FBGA
Organization
64Mx8
Address Bus
15b
Access Time (max)
700ps
Operating Supply Voltage (typ)
2.5V
Package Type
FBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Supply Current
175mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46V64M8BN-6:F
Manufacturer:
MICRON
Quantity:
5 000
Part Number:
MT46V64M8BN-6:F
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT46V64M8BN-6:F
Manufacturer:
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Part Number:
MT46V64M8BN-6:F TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 21:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
INITIALIZATION Flow Diagram
Step
10
11
12
13
14
15
16
17
18
19
20
21
1
2
3
4
5
6
7
8
9
Assert NOP or DESELECT commands for t RFC
Configure load mode register and reset DLL
Optional LMR command to clear DLL bit
Assert NOP or DESELECT for t MRD time
Assert NOP or DESELECT for t MRD time
Assert NOP or DESELECT for t MRD time
Bring CKE HIGH with a NOP command
DRAM is ready for any valid command
Assert NOP or DESELECT for t RFC time
Assert NOP or DESELECT for t RP time
Assert NOP or DESELECT for t RP time
Configure extended mode register
Issue AUTO REFRESH command
Issue AUTO REFRESH command
CKE must be LVCMOS LOW
Apply stable CLOCKs
V
Wait at least 200µs
Apply V
DD
PRECHARGE ALL
PRECHARGE ALL
and V
REF
DD
and V
Q ramp
TT
53
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR SDRAM
©2000 Micron Technology, Inc. All rights reserved.
Operations

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