S71GL016A40BAW1J0 Spansion Inc., S71GL016A40BAW1J0 Datasheet

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S71GL016A40BAW1J0

Manufacturer Part Number
S71GL016A40BAW1J0
Description
Combo Mem 1Mx16 Flash + 256Kx16 PSRAM 3V 56-Pin FBGA Tray
Manufacturer
Spansion Inc.
Datasheet

Specifications of S71GL016A40BAW1J0

Package
56FBGA
Organization
1Mx16 Flash + 256Kx16 PSRAM
Operating Supply Voltage
3 V
Operating Temperature
-25 to 85 °C
S71GL016A Based MCPs
Stacked Multi-Chip Product (MCP)
Flash Memory and RAM
16 Megabit (1M x 16-bit) CMOS 3.0 Volt-only
Page Mode Flash Memory
4 Megabit (256K x 16-bit) pSRAM
Data Sheet (Advance Information)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described herein may be designated as Advance Information,
Preliminary, or Full Production. See
Publication Number S71GL016A_00
Notice On Data Sheet Designations
Revision A
Amendment 1
for definitions.
Issue Date June 20, 2006
S71GL016A Based MCPs Cover Sheet

Related parts for S71GL016A40BAW1J0

S71GL016A40BAW1J0 Summary of contents

Page 1

S71GL016A Based MCPs Stacked Multi-Chip Product (MCP) Flash Memory and RAM 16 Megabit (1M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash Memory 4 Megabit (256K x 16-bit) pSRAM Data Sheet (Advance Information) Notice to Readers: This document states the ...

Page 2

Notice On Data Sheet Designations Spansion LLC issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all ...

Page 3

S71GL016A Based MCPs Stacked Multi-Chip Product (MCP) Flash Memory and RAM 16 Megabit (1M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash Memory 4 Megabit (256K x 16-bit) pSRAM Data Sheet (Advance Information) Features Power supply voltage of 2.7 V ...

Page 4

Product Selector Guide Device-Model# S71GL016A40-1J S71GL016A40-3J 2. MCP Block Diagram CE# WP#/ACC RESET# Flash-only Address Shared Address OE# WE# CE#s UB#s LB#s CE2 ...

Page 5

Connection Diagram Figure 3.1 56-ball Fine-Pitch Ball Grid Array (Top View, Balls Facing Down ...

Page 6

Pin Description A19– Address Inputs (Common and Flash only) DQ15–DQ0 = 16 Data Inputs/Outputs (Common) CE#f = Chip Enable (Flash) CE#s = Chip Enable 1 (pSRAM) OE# = Output Enable (Common) WE# = Write Enable (Common) RY/BY# ...

Page 7

Ordering Information The order number is formed by a valid combinations of the following: S71GL 016 A 6.1 Valid Combinations Valid Combinations list configurations planned to be supported in volume ...

Page 8

Physical Dimensions Figure 7.1 TLC056—56-ball Fine-Pitch Ball Grid Array (FBGA 0.15 C (2X) INDEX MARK PIN A1 CORNER 56X 0.15 M 0.08 M PACKAGE TLC 056 JEDEC N/A D ...

Page 9

Revision History Section Revision A (May 17, 2005) Initial Release Revision A1 (June 20, 2006) Global Data sheet updated to new template Added a table referencing the individual specification documents ...

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