ADUM1100BR Analog Devices Inc, ADUM1100BR Datasheet - Page 8
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ADUM1100BR
Manufacturer Part Number
ADUM1100BR
Description
Digital Isolators 8-Pin SOIC N
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheet
1.ADUM1100ARZ-RL7.pdf
(20 pages)
Specifications of ADUM1100BR
Package
8SOIC N
Operating Temperature
-40 to 105 °C
Rohs Status
RoHS non-compliant
Design Resources
USB Cable Isolator Circuit (CN0159)
Inputs - Side 1/side 2
1/0
Number Of Channels
1
Isolation Rating
2500Vrms
Voltage - Supply
3 V ~ 5.5 V
Data Rate
100Mbps
Propagation Delay
10.5ns
Output Type
Logic
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
105C
Package Type
SOIC N
Rad Hardened
No
For Use With
ADUM1100EVAL - BOARD EVAL FOR ADUM1100
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUM1100BR
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
ADUM1100BR-RL7
Manufacturer:
TI
Quantity:
6 053
Part Number:
ADUM1100BRZ-RL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADuM1100
Parameter
1
2
3
4
5
6
7
8
9
Output supply current values are with no output load present. See
the
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
t
rising edge of the V
Because the input thresholds of the ADuM1100 are at voltages other than the 50% level of typical input signals, the measured propagation delay and pulse width
distortion can be affected by slow input rise/fall times. See the
impact of given input rise/fall times on these parameters.
Pulse width distortion change vs. temperature is the absolute value of the change in pulse width distortion for a 1°C change in operating temperature.
t
recommended operating conditions. t
temperature, supply voltages, and output load within the recommended operating conditions.
CM
that can be sustained while maintaining V
over which the common-mode is slewed.
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See
supply current variation with logic signal frequency. See the
data rate and output load.
PHL
PSK1
Pulse width Distortion, |t
Propagation Delay Skew (Equal
Propagation Delay Skew (Equal
Output Rise/Fall Time (10% to 90%)
Common-Mode Transient Immunity at
H
is measured from the 50% level of the falling edge of the V
Power Consumption
is the magnitude of the worst-case difference in t
5 V/3 V Operation
3 V/5 V Operation
Change in Pulse Width Distortion vs.
Temperature)
5 V/3 V Operation
3 V/5 V Operation
Temperature, Supplies)
5 V/3 V Operation
3 V/5 V Operation
Logic Low/High Output
Refresh Rate
Input Dynamic Supply Current
Output Dynamic Supply Current
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
Temperature
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
I
signal to the 50% level of the rising edge of the V
5, 7
6
section for guidance on calculating the input and output supply currents for a given data rate and output load.
PLH
5, 7
8
− t
PHL
PSK2
|
9
5
is the magnitude of the worst-case difference in t
O
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling edges. The transient magnitude is the range
9
PHL
Symbol
PWD
t
t
t
|CM
|CM
f
C
C
PSK1
PSK2
R
r
PD1
PD2
, t
and/or t
F
L
H
|,
|
Power Consumption
I
Propagation Delay-Related Parameters
signal to the 50% level of the falling edge of the V
PLH
Figure 5
that is measured between units at the same operating temperature and output load within the
Min
25
O
signal.
Rev. H | Page 8 of 20
and
Figure 6
section for guidance on calculating the input and output supply currents for a given
Typ
0.5
0.5
3
10
3
35
1.2
1.1
0.09
0.08
0.04
0.02
for information on supply current variation with logic signal frequency. See
PHL
and/or t
Max
2
3
12
15
9
12
O
> 0.8 V
section and
PLH
that is measured between units at the same operating
DD2
Unit
ns
ns
ps/°C
ps/°C
ns
ns
ns
ns
ns
kV/μs
Mbps
Mbps
mA/Mbps
mA/Mbps
mA/Mbps
mA/Mbps
. CM
L
O
is the maximum common-mode voltage slew rate
signal. t
Figure 14
PLH
Test Conditions
C
C
C
C
C
C
C
C
C
V
transient magnitude = 800 V
Figure 5
I
L
L
L
L
L
L
L
L
L
through
is measured from the 50% level of the
= 0 V or V
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
and
Figure 18
Figure 6
DD1
, V
CM
for information on the
for information on
= 1000 V,