89HPES24T6ZCBXG Integrated Device Technology (Idt), 89HPES24T6ZCBXG Datasheet

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89HPES24T6ZCBXG

Manufacturer Part Number
89HPES24T6ZCBXG
Description
PCI Express Switch 420-Pin SBGA Tray
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.IDT89HPES24T61ZCBX8.pdf (33 pages)

Specifications of 89HPES24T6ZCBXG

Package
420SBGA
Operating Temperature
0 to 70 °C
Device Overview
Express® switching solutions. The PES24T6 is a 24-lane, 6-port periph-
eral chip that performs PCI Express packet switching with a feature set
optimized for high performance applications such as servers, storage,
and communications/networking. It provides connectivity and switching
functions between a PCI Express upstream port and up to five down-
stream ports and supports switching between downstream ports.
Features
Block Diagram
© 2008 Integrated Device Technology, Inc.
The 89HPES24T6 is a member of the IDT PRECISE™ family of PCI
SerDes
Logical
– Twenty-four 2.5 Gbps PCI Express lanes
– Six switch ports
– Upstream port configurable up to x8
– Downstream ports configurable up to x8
– Low-latency cut-through switch architecture
– Support for Max Payload Size up to 2048 bytes
– One virtual channel
– Eight traffic classes
– PCI Express Base Specification Revision 1.1 compliant
Layer
High Performance PCI Express Switch
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 0)
SerDes
Logical
Layer
Phy
Frame Buffer
SerDes
Logical
Layer
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Phy
®
SerDes
Logical
Layer
Phy
24-Lane 6-Port
PCI Express® Switch
Multiplexer / Demultiplexer
6-Port Switch Core / 24 PCI Express Lanes
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 1)
Route Table
Figure 1 Internal Block Diagram
SerDes
Logical
Layer
Phy
SerDes
Logical
1 of 33
Layer
Phy
Arbitration
– Automatic per port link width negotiation to x8, x4, x2 or x1
– Automatic lane reversal on all ports
– Automatic polarity inversion on all lanes
– Ability to load device configuration from serial EEPROM
– PCI compatible INTx emulation
– Bus locking
– Requires no external components
– Incorporates on-chip internal memory for packet buffering and
– Integrates twenty-four 2.5 Gbps embedded SerDes with 8B/
– Supports ECRC and Advanced Error Reporting
– Internal end-to-end parity protection on all TLPs ensures data
– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
– Compatible with Hot-Plug I/O expanders used on PC and
Flexible Architecture with Numerous Configuration Options
Legacy Support
Highly Integrated Solution
Reliability, Availability, and Serviceability (RAS) Features
Port
queueing
10B encoder/decoder (no separate transceivers needed)
integrity even in systems that do not implement end-to-end
CRC (ECRC)
server motherboards
Scheduler
SerDes
Logical
Layer
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 5)
89HPES24T6
Data Sheet
SerDes
Logical
Layer
Phy
April 23, 2008
SerDes
Logical
Layer
Phy
DSC 6923

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89HPES24T6ZCBXG Summary of contents

Page 1

Device Overview The 89HPES24T6 is a member of the IDT PRECISE™ family of PCI Express® switching solutions. The PES24T6 is a 24-lane, 6-port periph- eral chip that performs PCI Express packet switching with a feature set optimized for high ...

Page 2

IDT 89HPES24T6 Data Sheet Power Management – Utilizes advanced low-power design techniques to achieve low typical power consumption – Supports PCI Power Management Interface specification (PCI-PM 1.1) • Supports device power management states: D0 cold – Unused SerDes ...

Page 3

IDT 89HPES24T6 Data Sheet Processor SMBus PES24T6 Master SSMBCLK SSMBDAT MSMBCLK MSMBDAT (a) Unified Configuration and Management Bus Hot-Plug Interface The PES24T6 supports PCI Express Hot-Plug on each downstream port. To reduce the number of pins required on the device, ...

Page 4

IDT 89HPES24T6 Data Sheet Pin Description The following tables list the functions of the pins provided on the PES24T6. Some of the functions listed may be multiplexed onto the same pin. The active polarity of a signal is defined using ...

Page 5

IDT 89HPES24T6 Data Sheet Signal MSMBADDR[4:1] MSMBCLK MSMBDAT SSMBADDR[5,3:1] SSMBCLK SSMBDAT Signal GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] Type Name/Description I Master SMBus Address. These pins determine the SMBus address of the serial EEPROM from which configuration information is loaded. ...

Page 6

IDT 89HPES24T6 Data Sheet Signal GPIO[6] GPIO[7] GPIO[8] GPIO[9] GPIO[10] Signal CCLKDS CCLKUS MSMBSMODE P01MERGEN P23MERGEN Type Name/Description I/O General Purpose I/O. This pin can be configured as a general purpose I/O pin. I/O General Purpose I/O. This pin can ...

Page 7

IDT 89HPES24T6 Data Sheet Signal P45MERGEN PERSTN RSTHALT SWMODE[3:0] Signal JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N Type Name/Description I Port 4 and 5 Merge. P45MERGEN is an active low signal pulled low internally via a 251K ohm resistor. When ...

Page 8

IDT 89HPES24T6 Data Sheet Signal V CORE APE Type Name/Description I Core V . Power supply for core logic I LVTTL I/O ...

Page 9

IDT 89HPES24T6 Data Sheet Pin Characteristics Note: Some input pads of the PES24T6 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate levels. This is especially critical for unused control signal inputs which, if ...

Page 10

IDT 89HPES24T6 Data Sheet Function System Pins CCLKDS CCLKUS MSMBSMODE PERSTN P01MERGEN P23MERGEN P45MERGEN RSTHALT SWMODE[3:0] EJTAG / JTAG JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N 1. Internal resistor values under typical operating conditions are 54K Ω for pull-up and 251K Ω ...

Page 11

IDT 89HPES24T6 Data Sheet Logic Diagram — PES24T6 PEREFCLKP Reference PEREFCLKN Clocks PCI Express Switch SerDes Input Port 0 PCI Express Switch SerDes Input Port 1 PCI Express Switch SerDes Input Port 2 PCI Express Switch SerDes Input Port 3 ...

Page 12

IDT 89HPES24T6 Data Sheet System Clock Parameters Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 13 and 14. Parameter Refclk Input reference clock frequency range FREQ 2 Refclk Duty cycle of input ...

Page 13

IDT 89HPES24T6 Data Sheet Parameter T Max time between jitter median & max deviation RX-EYE-MEDIUM TO MAX JITTER T Unexpected Idle Enter Detect Threshold Integration Time RX-IDLE-DET-DIFF- ENTER TIME T Lane to lane input skew RX-SKEW 1. Minimum, Typical, and ...

Page 14

IDT 89HPES24T6 Data Sheet JTAG_TCK JTAG_TDI JTAG_TMS JTAG_TDO JTAG_TRST_N Recommended Operating Supply Voltages Symbol V CORE Internal logic supply DD V I/O I/O supply except for SerDes LVPECL/CML PCI Express Digital Power DD V APE PCI Express ...

Page 15

IDT 89HPES24T6 Data Sheet Recommended Operating Temperature Power Consumption Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 13 (and also listed below). Maximum power is measured ...

Page 16

IDT 89HPES24T6 Data Sheet Heat Sink Table 17 lists heat sink requirements for the PES24T6 under three common usage scenarios. As shown in this table, a heat sink is not required in most cases. . Air Flow Zero 3.9”x6.2” (ExpressModule ...

Page 17

IDT 89HPES24T6 Data Sheet DC Electrical Characteristics Values based on systems running at recommended supply voltages, as shown in Table 13. Note: See Table 8, Pin Characteristics, for a complete I/O listing. I/O Type Parameter Serial Link PCIe Transmit V ...

Page 18

IDT 89HPES24T6 Data Sheet I/O Type Parameter Other I/Os LOW Drive I OL Output I OH High Drive I OL Output I OH Schmitt Trig ger Input V IH (STI) Input Capacitance C IN ...

Page 19

IDT 89HPES24T6 Data Sheet Package Pinout — 420-BGA Signal Pinout for PES24T6 The following table lists the pin numbers and signal names for the PES24T6 device. Pin Function Alt Pin B10 ...

Page 20

IDT 89HPES24T6 Data Sheet Pin Function Alt Pin F23 F24 V APE K5 DD F25 V CORE K22 DD F26 V CORE K23 DD G1 PE3TN03 K24 G2 PE3TP03 K25 K26 DD G4 PE3RN03 ...

Page 21

IDT 89HPES24T6 Data Sheet Pin Function Alt Pin AA5 PE2RP00 AC3 AA22 PE5RP03 AC4 AA23 PE5RN03 AC5 AA24 V PE AC6 DD AA25 PE5TP03 AC7 AA26 PE5TN03 AC8 AB1 V AC9 SS AB2 V AC10 SS AB3 V CORE AC11 ...

Page 22

IDT 89HPES24T6 Data Sheet Power Pins V Core V Core C14 F25 C16 F26 M26 D8 P1 D10 P26 D12 T1 D13 T26 D15 V1 D17 V26 D18 AB3 D19 AB4 D21 AB5 ...

Page 23

IDT 89HPES24T6 Data Sheet Ground Pins A14 A23 A25 A26 B1 B2 B13 B16 B25 B26 C10 C12 C18 C20 C24 C25 D11 D14 H5 ...

Page 24

IDT 89HPES24T6 Data Sheet Alternate Signal Functions Signals Listed Alphabetically Signal Name CCLKDS CCLKUS GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08 GPIO_09 GPIO_10 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N Pin GPIO Alternate B18 GPIO[0] P2RSTN A19 GPIO[1] P4RSTN B19 ...

Page 25

IDT 89HPES24T6 Data Sheet Signal Name MSMBADDR_1 MSMBADDR_2 MSMBADDR_3 MSMBADDR_4 MSMBCLK MSMBDAT MSMBSMODE P01MERGEN P23MERGEN P45MERGEN PE0RN00 PE0RN01 PE0RN02 PE0RN03 PE0RP00 PE0RP01 PE0RP02 PE0RP03 PE0TN00 PE0TN01 PE0TN02 PE0TN03 PE0TP00 PE0TP01 PE0TP02 PE0TP03 PE1RN00 PE1RN01 PE1RN02 PE1RN03 PE1RP00 PE1RP01 PE1RP02 I/O ...

Page 26

IDT 89HPES24T6 Data Sheet Signal Name PE1RP03 PE1TN00 PE1TN01 PE1TN02 PE1TN03 PE1TP00 PE1TP01 PE1TP02 PE1TP03 PE2RN00 PE2RN01 PE2RN02 PE2RN03 PE2RP00 PE2RP01 PE2RP02 PE2RP03 PE2TN00 PE2TN01 PE2TN02 PE2TN03 PE2TP00 PE2TP01 PE2TP02 PE2TP03 PE3RN00 PE3RN01 PE3RN02 PE3RN03 PE3RP00 PE3RP01 PE3RP02 PE3RP03 PE3TN00 ...

Page 27

IDT 89HPES24T6 Data Sheet Signal Name PE3TN03 PE3TP00 PE3TP01 PE3TP02 PE3TP03 PE4RN00 PE4RN01 PE4RN02 PE4RN03 PE4RP00 PE4RP01 PE4RP02 PE4RP03 PE4TN00 PE4TN01 PE4TN02 PE4TN03 PE4TP00 PE4TP01 PE4TP02 PE4TP03 PE5RN00 PE5RN01 PE5RN02 PE5RN03 PE5RP00 PE5RP01 PE5RP02 PE5RP03 PE5TN00 PE5TN01 PE5TN02 PE5TN03 PE5TP00 ...

Page 28

IDT 89HPES24T6 Data Sheet Signal Name PE5TP03 PEREFCLKN1 PEREFCLKN2 PEREFCLKP1 PEREFCLKP2 PERSTN REFCLKM RSTHALT SSMBADDR_1 SSMBADDR_2 SSMBADDR_3 SSMBADDR_5 SSMBCLK SSMBDAT SWMODE_0 SWMODE_1 SWMODE_2 SWMODE_3 V CORE APE ...

Page 29

IDT 89HPES24T6 Data Sheet PES24T6 Pinout — Top View ...

Page 30

IDT 89HPES24T6 Data Sheet PES24T6 Package Drawing — 420-Pin BX420/BXG420 April 23, 2008 ...

Page 31

IDT 89HPES24T6 Data Sheet PES24T6 Package Drawing — Page Two April 23, 2008 ...

Page 32

IDT 89HPES24T6 Data Sheet Revision History February 8, 2007: Initial publication. April 4, 2007: In Table 3, revised description for MSMBCLK signal. May 30, 2007: Added ZG device revision to Ordering Information. November 14, 2007: Added new parameter, Termination Resistor, ...

Page 33

... BX420 package, Commercial Temperature 89HPES24T6ZGBX 420-pin BX420 package, Commercial Temperature 89HPES24T61ZCBX 420-pin BX420 package, Commercial Temperature 89HPES24T6ZCBXG 420-pin Green BX420 package, Commercial Temperature 89HPES24T6ZGBXG 420-pin Green BX420 package, Commercial Temperature 89HPES24T61ZCBXG 420-pin Green BX420 package, Commercial Temperature CORPORATE HEADQUARTERS ...

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