PEX 8533-AA25BI G PLX Technology, PEX 8533-AA25BI G Datasheet

PEX 8533-AA25BI G

Manufacturer Part Number

PEX 8533-AA25BI G

Description

PCI Express Switch 680-Pin BGA

Manufacturer

PLX Technology

Datasheet

1.PEX_8533-AA25BI_G.pdf (4 pages)

Specifications of PEX 8533-AA25BI G

Package

680BGA

Current page: 1 of 4
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Features

PEX 8533 General Features

o 32-lane PCI Express switch

o Up to six configurable ports

o 35mm x 35mm,

o Pin Compatible with PEX 8532

o Typical Power: 3.3 Watts

PEX 8533 Key Features

o Standards Compliant

o High Performance

o Flexible Configuration

o PCI Express Power Management

o Quality of Service (QoS)

o Reliability, Availability,

- Integrated SerDes

680-ball PBGA package

- PCI Express Base Specification, r1.1

- PCI SHPC Specification, r1.0

- Cut-through with 120ns packet

- Max Payload Size of 1024 Bytes

- Non-blocking switch fabric

- Full line rate on all ports

- Six highly flexible and configurable

- Configurable with strapping pins,

- Lane and polarity reversal

- Link power management states: L0,

- Device states: D0 and D3hot

- Eight Traffic Classes per port

- Round robin and weighted RR port

Serviceability

- 3 Standard Hot-Plug Controllers

- Upstream port as hot-plug client

- Transaction Layer end-to-end CRC

- Poison bit

- INTA & FATAL ERROR signal

- Advanced Error Reporting in addition

- Port Status bits and GPO available

- Per port performance monitoring

- JTAG boundary scan

latency

ports (x1, x2, x4, x8, or x16)

EEPROM, I

L0s, L1, L2/L3 Ready, and L3

arbitration

support

to PCIe baseline error reporting

• Average packet size, number of

packets, CRC errors

Version 1.5 2008

C or Host software

Multi-Purpose, Feature Rich PCI Express ExpressLane™ Switch

The ExpressLane

capability conforming to the latest revision of the PCIe Base specification.

This device enables users to add scalable high bandwidth, non-blocking

interconnects to a wide variety of applications including servers, storage

systems, communications platforms, blade servers, and embedded-control

products. The PEX 8533 is well suited for fan-out, aggregation, peer-to-

peer, backplane, and switch fabric applications.

Highly Flexible Port Configurations

The ExpressLane

maximum of 6 ports that can be configured to any legal width from x1 to

x16, in any combination to support your specific bandwidth needs. The ports

can be symmetric (each port having the same lane width) or asymmetric

(ports having different lane widths). Any of the ports can be designated as

the upstream port, which can be changed dynamically.

High Performance

The ExpressLane

with a latency of 115ns (x8 to x8). This, combined with large packet

memory (256 to 1024 byte maximum payload size) and non-blocking

internal switch architecture, provide full line rate on its ports for

performance hungry applications such as storage servers or storage switch

fabrics.

End-to-End Packet Integrity

The ExpressLane

protection (ECRC) and Poison bit support to enable designs that require

guaranteed error-free packets.

Configuration Flexibility

The ExpressLane

operations. The device can be configured through strapping pins, I

interface, CPU configuration cycles, or an optional serial EEPROM. This

allows for easy debug during the development phase, performance

monitoring during the operation phase, and driver or software upgrade.

Interoperability

The ExpressLane

PCI-SIG specification. Additionally, it supports auto-negotiation, lane

reversal, and polarity reversal. The PEX 8533 also undergoes thorough

Interoperability testing in PLX’s Interoperability Lab.

Low Power with Granular SerDes Control

The ExpressLane

compliant with the PCI Express power management specification. In

addition, the SerDes physical links can be turned off when unused for even

lower power.

Flexible & Versatile PCI Express™ Switch

PLX Confidential

PEX 8533

PEX 8533 device offers PCI Express switching

PEX 8533 offers highly configurable ports. There are a

PEX 8533 architecture supports packet cut-through

PEX 8533 provides optional end-to-end CRC

PEX 8533 provides several ways to configure its

PEX 8533 is designed to be fully compliant with the

PEX 8533 provides low power capability that is fully

Related parts for PEX 8533-AA25BI G

PEX 8533-AA25BI G Summary of contents

Page 1

... This device enables users to add scalable high bandwidth, non-blocking interconnects to a wide variety of applications including servers, storage systems, communications platforms, blade servers, and embedded-control products. The PEX 8533 is well suited for fan-out, aggregation, peer-to- peer, backplane, and switch fabric applications. Highly Flexible Port Configurations ...

Page 2

... Advanced Error Reporting features make them suitable for high availability (HA) applications. Three of the six ports include a Standard Hot Plug Controller. If the PEX 8533 is used in an application where one or more of its downstream ports connect to PCI Express slots, the ports with the Hot Plug Controller feature can be used for these slots ...

Page 3

... Redundant Switch Fabric The PEX 8533 can be used in redundant switch fabrics for high availability applications. In the example shown in Figure 5, the PEX 8533 is used in conjunction with the PEX 8518 switch that offers non-transparent bridging (NTB). The PEX 8533 provides high performance non-blocking switching while the PEX 8518s keep the two fabrics and hosts isolated ...

Page 4

... Port 0 - x16 PERST# (Upstream Port) Figure 6. PEX 8533 RDK The PEX 8533 RDK offers a x16 upstream port, one x8 downstream port, and two x4 downstream ports. The PEX 8533 RDK board can be installed on a motherboard, used as a riser card, or configured as a bench-top board. The PEX 8533 RDK can be used to Product Ordering Information PLX Technology, Inc ...

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