TS820-600B-TR STMicroelectronics, TS820-600B-TR Datasheet - Page 4

SCR 8A 600V DPAK

TS820-600B-TR

Manufacturer Part Number
TS820-600B-TR
Description
SCR 8A 600V DPAK
Manufacturer
STMicroelectronics
Type
SCRr
Datasheet

Specifications of TS820-600B-TR

Scr Type
Sensitive Gate
Voltage - Off State
600V
Voltage - Gate Trigger (vgt) (max)
800mV
Voltage - On State (vtm) (max)
1.6V
Current - On State (it (av)) (max)
5A
Current - On State (it (rms)) (max)
8A
Current - Gate Trigger (igt) (max)
200µA
Current - Hold (ih) (max)
5mA
Current - Off State (max)
5µA
Current - Non Rep. Surge 50, 60hz (itsm)
70A, 73A
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Current - On State (it (rms) (max)
8A
Repetitive Peak Off-state Volt
600V
Off-state Voltage
600V
Average On-state Current
5A
Hold Current
5mA
Gate Trigger Current (max)
200uA
Gate Trigger Voltage (max)
800mV
Peak Reverse Gate Voltage
8V
Package Type
DPAK
Peak Repeat Off Current
5uA
Peak Surge On-state Current (max)
73A
On State Voltage(max)
1.6@16AV
Mounting
Surface Mount
Pin Count
2 +Tab
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5234-2
TS820-600B-TR

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Characteristics
4/12
Figure 3.
Figure 5.
Figure 7.
1.00
0.10
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.01
-40
1E-2
I
0
I
GT H L
T(AV)
K=[Z
,I ,I [T ] /
I
Recommended pad layout,
FR4 printed circuit board
H
& I
-20
(A)
th(j-a)
L
I
GT
j
25
Average and DC on-state current
versus ambient temperature
(DPAK)
Relative variation of thermal
impedance junction to ambient
versus pulse duration (DPAK)
Relative variation of gate trigger
and holding current versus junction
temperature
= 180°
/R
1E-1
0
I
th(j-a)
GT H L
,I ,I [T =25°C]
D.C.
20
]
50
DPAK
1E+0
j
T
40
T (°C)
amb
t (s)
j
p
(°C)
TO-220AB / IPAK
60
Recommended pad layout,
FR4 printed circuit board
75
1E+1
80
TN8 and TYNx8
100
100
1E+2
Doc ID 7476 Rev 6
120
5E+2
125
140
TN805, TN815, TS820, TYN608, TYN808, TYN1008
Figure 4.
Figure 6.
Figure 8.
1.0
0.5
0.2
0.1
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1E-2
-40
1E-3
I [R
K=[Z
I
H
GT H L
TS8
,I ,I [T ] /
GK
th(j-c)
R
-20
GK
I
H
] / I [
& I
= 1k
I
GT
L
/R
H
j
Relative variation of thermal
impedance junction to case versus
pulse duration
Relative variation of gate trigger
current and holding current versus
junction temperature for TS820
Relative variation of holding
current versus gate-cathode
resistance (typical values)
R
th(j-c)
0
I
GK
GT H L
=1k ]
,I ,I [T =25°C]
]
1E-1
1E-2
20
j
R
40
T (°C)
GK
t (s)
j
p
(k )
60
1E+0
1E-1
80
100
T
j
= 25°C
120
1E+0
1E+1
140

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