AD7249BR Analog Devices Inc, AD7249BR Datasheet - Page 3

• Manufacturer Part Number: AD7249BR
• Description: DAC 2-CH R-2R 12-Bit 16-Pin SOIC W
• Manufacturer: Analog Devices Inc
• Series: DACPORT®r

Specifications of AD7249BR

• Package: 16SOIC W
• Resolution: 12 Bit
• Conversion Rate: 125 KSPS
• Architecture: R-2R
• Digital Interface Type: Serial (3-Wire)
• Number Of Outputs Per Chip: 2
• Output Type: Voltage
• Full Scale Error: ±6 LSB
• Integral Nonlinearity Error: ±0.5 LSB
• Maximum Settling Time: 10 us
• Rohs Status: RoHS non-compliant
• Settling Time: 10µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 300mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)

TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
t
t
t
t
NOTES
1
2
3
4
ABSOLUTE MAXIMUM RATINGS
(T
V
V
AGND to DGND . . . . . . . . . . . . . . . . . –0.3 V to V
V
REFOUT to AGND . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
REFIN to AGND . . . . . . . . . . . . . . . . . –0.3 V to V
Digital Inputs to DGND . . . . . . . . . . . . –0.3 V to V
Operating Temperature Range
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Power Dissipation Plastic DIP . . . . . . . . . . . . . . . . . . . 600 mW
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7249 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Timing specifications guaranteed by design not production tested. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage
See Figure 8.
Power supply tolerance, A Version: ± 10%; B, S Versions: ± 5%.
SCLK Mark/Space Ratio range is 45/55 to 55/45.
1
2
3
4
5
6
7
8
9
10
level of 1.6 V.
4
DD
SS
OUTA, B
A
Industrial (A, B Versions) . . . . . . . . . . . . . . –40°C to +85°C
Extended (S Version) . . . . . . . . . . . . . . . . . –55°C to +125°C
θ
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . +300°C
= +25°C unless otherwise noted)
JA
to AGND, DGND . . . . . . . . . . . . . . . . . . +0.3 V to –17 V
to AGND, DGND . . . . . . . . . . . . . . . . . . –0.3 V to +17 V
Thermal Impedance . . . . . . . . . . . . . . . . . . . . +117°C/W
2
to AGND . . . . . . . . . . . . V
Limit at T
(All Versions)
200
15
50
0
150
0
20
0
50
20
1
MIN
SS
1, 2
– 0.3 V to V
to T
(V
C
L
MAX
DD
= 100 pF. All specifications T
= +12 V to +15 V,
DD
DD
DD
DD
+ 0.3 V
+ 0.3 V
+ 0.3 V
+ 0.3 V
DD
3
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
V
Power Dissipation, Cerdip . . . . . . . . . . . . . . . . . . . . . . 600 mW
Power Dissipation, SOIC . . . . . . . . . . . . . . . . . . . . . . . 600 mW
NOTES
1
2
SS
Stresses above those listed under Absolute Maximum Ratings may cause perma-
The outputs may be shorted to voltages in this range provided the power dissipation
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one Absolute
Maximum Rating may be applied at any time.
of the package is not exceeded.
θ
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . +300°C
θ
Lead Temperature (Soldering)
= 0 V or –12 V to –15 V,
JA
JA
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 76°C/W
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 75°C/W
MIN
to T
MAX
unless otherwise noted.)
Conditions/Comments
SCLK Cycle Time
SYNC to SCLK Falling Edge Setup Time
SYNC to SCLK Hold Time
Data Setup Time
Data Hold Time
SYNC High to LDAC Low
LDAC Pulsewidth
LDAC High to SYNC Low
CLR Pulsewidth
SYNC High Time
3
AGND = DGND = 0 V, R
WARNING!
ESD SENSITIVE DEVICE
L
AD7249
= 2 k ,