AD558SD Analog Devices Inc, AD558SD Datasheet - Page 7

• Manufacturer Part Number: AD558SD
• Description: DAC 1-CH R-2R 8-Bit 16-Pin SBCDIP
• Manufacturer: Analog Devices Inc
• Series: DACPORT®r

Specifications of AD558SD

• Package: 16SBCDIP
• Resolution: 8 Bit
• Architecture: R-2R
• Digital Interface Type: Parallel
• Number Of Outputs Per Chip: 1
• Output Type: Voltage
• Full Scale Error: ±2.5 LSB
• Integral Nonlinearity Error: ±0.75 LSB
• Maximum Settling Time: 3 us
• Rohs Status: RoHS non-compliant
• Settling Time: 800ns
• Number Of Bits: 8
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 375mW
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: 16-CDIP (0.300", 7.62mm)

REV. A
INTERFACING THE AD558 TO MICROPROCESSOR
DATA BUSES
The AD558 is configured to act like a “write only” location in
memory that may be made to coincide with a read only memory
location or with a RAM location. The latter case allows data
previously written into the DAC to be read back later via the
RAM. Address decoding is partially complete for either ROM
or RAM. Figure 12 shows interfaces for three popular micropro-
cessor systems.
Performance
FULL
SCALE
ERROR
Performance of AD558
Figure 13. Full-Scale Accuracy vs. Temperature
6800
VMA
R/W
16
8
0
2
Figure 11. Offset Connection Diagrams
–0.25
–0.50
–0.75
–1.00
LSB
1.75
1.50
1.25
1.00
0.75
0.50
0.25
R/W
GATED DECODED ADDRESS
b. 0 V to 10 V Output Range
–55
a. 6800/AD558 Interface
OUTPUT
ADDRESS BUS
CE
(typical @ +25 C, V
AMP
ADDRESS
DECODER
DATA BUS
–25
1LSB = 0.39% OF FULL SCALE
16
14
15
13
16
0
V
V
+25
OUT
OUT
AGND
V
SENSE
SELECT
OUT
+50
ALL AD558
AD558S, T
CS
CC
–V
+75
+5 V to +15 V unless otherwise noted)
CS
CE
0.5mA
+100
DB0–DB7
8
AD558
+125
V
o C
OUT
–7–
Figure 12. Interfacing the AD558 to Microprocessors
ZERO
ERROR
Figure 14. Zero Drift vs. Temperature Performance
of AD558
8080A
1802
8
0
16
8
MA 0 – 7
8
CDP 1802: MWR
LSB
–1/4
–1/2
1/4
1/2
MWR
TPA
MEMW
–55
b. 8080A/AD558 Interface
DECODED ADDRESS SELECT PULSE
c. 1802/AD558 Interface
MEMW
DECODED ADDRESS SELECT PULSE
ADDRESS BUS
ADDRESS BUS
–25
ADDRESS SELECT
DATA BUS
DATA BUS
PULSE LOGIC
1LSB = 0.39% OF FULL SCALE
CE
ADDRESS
DECODE
LATCH
CE
0
&
16
8
+25
+50
ALL AD558
AD558S, T
+75
CS
CS
CE
CE
+100
CS
CS
8
AD558
DB0–DB7
8
DB0–DB7
AD558
AD558
+125
o C
V
V
OUT
OUT