MT8815AP1 Zarlink, MT8815AP1 Datasheet - Page 4

• Manufacturer Part Number: MT8815AP1
• Description: Analog Audio/Video Crosspoint 45MHz 12 x 8 44-Pin PLCC Tube
• Manufacturer: Zarlink

Specifications of MT8815AP1

• Package: 44PLCC
• Number Of Arrays: 1
• Power Supply Type: Single
• 3db Bandwidth: 45 MHz
• Minimum Single Supply Voltage: 4.5 V
• Maximum Single Supply Voltage: 13.2 V
• Maximum On Resistance: 185 Ohm

MT8815
Data Sheet
Functional Description
The MT8815 is an analog switch matrix with an array size of 8×12. The switch array is arranged such that there are
8 columns by 12 rows. The columns are referred to as the Y inputs/outputs and the rows are the X inputs/outputs.
The crosspoint analog switch array will interconnect any X I/O with any Y I/O when turned on and provide a high
degree of isolation when turned off. The control memory consists of a 96 bit write only RAM in which the bits are
selected by the address inputs (AY0-AY2, AX0-AX3). Data is presented to the memory on the DATA input. Data is
asynchronously written into memory whenever the STROBE input is high and is latched on the falling edge of
STROBE. A logical “1” written into a memory cell turns the corresponding crosspoint switch on and a logical “0”
turns the crosspoint off. Only the crosspoint switches corresponding to the addressed memory location are altered
when data is written into memory. The remaining switches retain their previous states. Any combination of X and Y
inputs/outputs can be interconnected by establishing appropriate patterns in the control memory. A logical “1” on
the RESET input will asynchronously return all memory locations to logical
“0”
turning
off
all
crosspoint
switches. Two voltage reference pins (V
and V
) are provided for the MT8815 to enable switching of negative
SS
EE
analog signals. The range for digital signals is from V
to V
while the range for analog signals is from V
to
DD
SS
DD
V
. V
and V
pins can be tied together if a single voltage reference is needed.
EE
SS
EE
Address Decode
The seven address inputs along with the STROBE are logically ANDed to form an enable signal for the resettable
transparent latches. The DATA input is buffered and is used as the input to all latches. To write to a location, RESET
must be low while the address and data are set up. Then the STROBE input is set high and then low causing the
data to be latched. The data can be changed while STROBE is high, however, the corresponding switch will turn on
and off in accordance with the DATA input. DATA must be stable on the falling edge of STROBE in order for correct
data to be written to the latch.
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Zarlink Semiconductor Inc.