821054PQF Integrated Device Technology (Idt), 821054PQF Datasheet - Page 27

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821054PQF

Manufacturer Part Number
821054PQF
Description
Audio Codec 4ADC / 4DAC 64-Pin PQFP
Manufacturer
Integrated Device Technology (Idt)
Type
PCMr
Datasheet

Specifications of 821054PQF

Package
64PQFP
Number Of Channels
4ADC /4 DAC
Number Of Dacs
4
Operating Supply Voltage
5 V

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Part Number:
821054PQFG
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IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
GREG10: SB1 Direction Control and SB1 Status/Control Data, Read/Write (29H/A9H)
GREG11: SB2 Direction Control and SB2 Status/Control Data, Read/Write (2AH/AAH)
GREG12: SB3 Direction Control and SB3 Status/Control Data, Read/Write (2BH/ABH)
The SB1 direction control bits SB1C[3:0] in this register determine the directions of the SB1 pins of Channel 4 to Channel 1 respectively.
SB1C[0] = 0:
SB1C[0] = 1:
SB1C[1] = 0:
SB1C[1] = 1:
SB1C[2] = 0:
SB1C[2] = 1:
SB1C[3] = 0:
SB1C[3] = 1:
When the SB1 pins of Channel 1 to Channel 4 are configured as inputs, the SB1[0] to SB1[3] bits contain the status of these four SB1
pins respectively. When the SB1 pins of Channel 1 to Channel 4 are configured as outputs, the control data is written to these four SB1
pins via the SB1[0] to SB1[3] bits respectively.
The SB2 direction control bits SB2C[3:0] in this register determine the directions of the SB2 pins of Channel 4 to Channel 1 respectively.
SB2C[0] = 0:
SB2C[0] = 1:
SB2C[1] = 0:
SB2C[1] = 1:
SB2C[2] = 0:
SB2C[2] = 1:
SB2C[3] = 0:
SB2C[3] = 1:
When the SB2 pins of Channel 1 to Channel 4 are configured as inputs, the SB2[0] to SB2[3] bits contain the status of these four SB2
pins respectively. When the SB2 pins of Channel 1 to Channel 4 are configured as outputs, the control data is written to these four SB2
pins via the SB2[0] to SB2[3] bits respectively.
The SB3 direction control bits SB3C[3:0] in this register determine the directions of the SB3 pins of Channel 4 to Channel 1 respectively.
SB3C[0] = 0:
SB3C[0] = 1:
SB3C[1] = 0:
SB3C[1] = 1:
SB3C[2] = 0:
SB3C[2] = 1:
SB3C[3] = 0:
SB3C[3] = 1:
When the SB3 pins of Channel 1 to Channel 4 are configured as inputs, the SB3[0] to SB3[3] bits contain the status of these four SB3
Command
Command
Command
I/O data
I/O data
I/O data
SB1C[3]
SB2C[3]
SB3C[3]
R/W
R/W
R/W
b7
b7
b7
the SB1 pin of Channel 1 is configured as input (default);
the SB1 pin of Channel 1 is configured as output;
the SB1 pin of Channel 2 is configured as input (default);
the SB1 pin of Channel 2 is configured as output;
the SB1 pin of Channel 3 is configured as input (default);
the SB1 pin of Channel 3 is configured as output;
the SB1 pin of Channel 4 is configured as input (default);
the SB1 pin of Channel 4 is configured as output.
the SB2 pin of Channel 1 is configured as input (default);
the SB2 pin of Channel 1 is configured as output;
the SB2 pin of Channel 2 is configured as input (default);
the SB2 pin of Channel 2 is configured as output;
the SB2 pin of Channel 3 is configured as input (default);
the SB2 pin of Channel 3 is configured as output;
the SB2 pin of Channel 4 is configured as input (default);
the SB2 pin of Channel 4 is configured as output.
the SB3 pin of Channel 1 is configured as input (default);
the SB3 pin of Channel 1 is configured as output;
the SB3 pin of Channel 2 is configured as input (default);
the SB3 pin of Channel 2 is configured as output;
the SB3 pin of Channel 3 is configured as input (default);
the SB3 pin of Channel 3 is configured as output;
the SB3 pin of Channel 4 is configured as input (default);
the SB3 pin of Channel 4 is configured as output.
SB1C[2]
SB2C[2]
SB3C[2]
b6
b6
b6
0
0
0
SB1C[1]
SB2C[1]
SB3C[1]
b5
b5
b5
1
1
1
SB1C[0]
SB2C[0]
SB3C[0]
27
b4
b4
b4
0
0
0
SB1[3]
SB2[3]
SB3[3]
b3
b3
b3
1
1
1
SB1[2]
SB2[2]
SB3[2]
b2
b2
b2
0
0
0
INDUSTRIAL TEMPERATURE RANGE
SB1[1]
SB2[1]
SB3[1]
b1
b1
b1
0
1
1
SB1[0]
SB2[0]
SB3[0]
b0
b0
b0
1
0
1

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