ISL5585FCRZ Intersil, ISL5585FCRZ Datasheet - Page 21

• Manufacturer Part Number: ISL5585FCRZ
• Description: SLIC 1-CH 53dB 45mA 3.3V/-18V/-24V/-28V 32-Pin QFN EP
• Manufacturer: Intersil

Specifications of ISL5585FCRZ

• Package: 32QFN EP
• Number Of Channels Per Chip: 1
• Polarity Reversal: Yes
• Longitudinal Balanced: 53(Min) dB
• Loop Current: 45 mA
• Minimum Operating Supply Voltage: 2.97|-16 V
• Typical Operating Supply Voltage: 3.3|-18|-24|-28 V
• Typical Supply Current: 9.3 mA

switch is designed to have a maximum on voltage of 0.6V
with a load current of 45mA.
Since the device provides the ringing waveform, the relay
functions which may be supported include subscriber
disconnect, test access or line interface bypass. An external
snubber diode is not required when using the uncommitted
switch as a relay driver.
Test Load
The switch may be used to connect test loads across Tip and
Ring. The test loads can provide external test termination for
the device. Proper connection of the uncommitted switch to
Tip and Ring is shown below.
The diode in series with the test load blocks current from
flowing through the uncommitted switch when the polarity of
the Tip and Ring terminals are reversed. In addition to the
reverse active state, the polarity of Tip and Ring are reversed
for half of the ringing cycle. With independent logic control
and the blocking diode, the uncommitted switch may be
continuously connected to the Tip and Ring terminals.
RING
FIGURE 15. EXTERNAL RELAY SWITCHING
TIP
FIGURE 16. TEST LOAD SWITCHING
+V
RELAY
SW+
SW-
LOAD
TEST
21
SW+
SW-
SWC
SWC
ISL5585
Design Parameters: Ring Trip Threshold = 76mA
Threshold = 12mA, Loop Current Limit = 24.6mA, Synthesize Device
Impedance = (3*66.5kΩ)/400 = 498.8Ω, with 49.9Ω protection
resistors, impedance across Tip and Ring terminals = 599Ω.
Transient current limit = 95mA.
Special Considerations for the QFN
Package
The new Quad Flatpack No-lead (QFN) package offers a
significant footprint reduction (65%) and improved thermal
performance with respect to the 28 lead PLCC. To realize the
thermal enhancements and maintain the high voltage
(-100V) performance, the exposed pad on the bottom of the
QFN package should be soldered to a power/heat sink plane
that is electrically connected to the ISL5585 Substrate
Common Connection (SCC) pin. The heat is distributed
evenly across the board by way of the heat sink plane. This
is accomplished by using conductive thermal vias.
Reference technical brief TB379 and AN9922 for additional
information on thermal characterization and board layout
considerations.
U1 - Ringing SLIC
R
R
R
R
R
R
R
R
R
C
C
C
C
D
R
Standard applications will use ≥ 49Ω per side. Protection resistor
values are application dependent and will be determined by
protection requirements.
TL
RT
SH
IL
S
F
A
B
IN
RS
DC
PS1
PS2
1
P1
TABLE 2. ISL5585 3V APPLICATION CIRCUIT COMPONENTS
, R
, C
, C
, C
P2
COMPONENT
TX
FB
PS3
, C
RT
, C
POL
1N400X type with breakdown > 100V.
42.2KkΩ
ISL5585
VALUE
18.7kΩ
23.7kΩ
49.9kΩ
71.5kΩ
66.5kΩ
30.1kΩ
36.5kΩ
45.3kΩ
0.47µF
4.7µF
0.1µF
0.1µF
TOL
20%
20%
20%
20%
N/A
PEAK
1%
1%
1%
1%
1%
1%
1%
1%
1%
, Switch Hook
RATING
>100V
0.1W
0.1W
0.1W
0.1W
0.1W
0.1W
0.1W
0.1W
0.1W
100V
6.3V
N/A
10V