MT88E43BS1 Zarlink, MT88E43BS1 Datasheet - Page 4

• Manufacturer Part Number: MT88E43BS1
• Description: Caller ID CMOS 3.58MHz 3.3V/5V 24-Pin SOIC Tube
• Manufacturer: Zarlink

Specifications of MT88E43BS1

• Package: 24SOIC
• Telecommunication Standards Supported: GR-30|SIN227|SIN242|SR-TSV-002476|TR-NWT-000030
• Fabrication Technology: CMOS
• Maximum Data Rate: 1212 Bd
• Typical Operating Supply Voltage: 3.3|5 V
• Typical Supply Current: 3 mA
• Minimum Operating Temperature: -40 °C
• Maximum Operating Temperature: 85 °C
• Operating Frequency: 3.58 MHz

The U.K.’s CCA specification TW/P&E/312 proposes an alternate CDS TE interface. According to TW/P&E/312,
data is transmitted after a single burst of ringing rather than before the first ringing cycle (as specified in the BT
standards). The Idle State Tone Alert Signal is not required as it is replaced by a single ring burst. MT88E43 has the
capability to detect the ring burst. It can also demodulate either Bell-202 or CCITT V.23 FSK data following the ring
burst. The U.K.’s CCA specifies that data can be transmitted in either format.
Bellcore specification GR-30-CORE is the generic requirement for transmitting asynchronous voiceband data to
Customer Premises Equipment (CPE). Another Bellcore specification SR-TSV-002476 describes the same
requirements from the CPE’s perspective. The data transmission technique specified in both documents is
applicable in a variety of services like Calling Number Delivery (CND), Calling Name Delivery (CNAM) and Calling
Identity Delivery on Call Waiting (CIDCW) - services promoted by Bellcore.
In CND/CNAM service, information about a calling party is embedded in the silent interval between the first and
second ring burst. The MT88E43 detects the first ring burst and can then be setup to receive and demodulate the
incoming Bell-202 FSK data. The device will output the demodulated data onto a 3-wire serial interface.
In CIDCW service, information about an incoming caller is sent to the subscriber, while he/she is engaged in
another call. A CPE Alerting Signal (CAS) indicates the arrival of CIDCW information. The MT88E43 can detect the
alert signal and then be setup to demodulate incoming FSK data containing CIDCW information.
Functional Description
Detection of CLIP/CID Call Arrival Indicators
The circuit in Figure 3 illustrates the relationship between the TRIGin, TRIGRC and TRIGout signals. Typically, the
three pin combination is used to detect an event indicated by an increase of the TRIGin voltage from V
the Schmitt trigger high going threshold V
Figure 3 shows a circuit to detect any one of three CLIP/CID call arrival indicators: line reversal, ring burst and
ringing.
The application circuit must ensure that,
V
where max V
Tolerance to noise between A/B and V
max V
where min V
Suggested R
R5 from 10KΩ to 500KΩ
C3 from 47nF to 0.68µF
An example is C3=220nF, R5=150KΩ; TRIGout low
from 21.6ms to 37.6ms after TRIGin Signal stops
triggering the circuit.
Notes:
TRIGin
noise
>max V
Ring/B
Tip/A
= (min V
T+
T+
5
C
T+
= 2.16V @V
=3.74V @V
3
component values:
C1=100nF
C2=100nF
T+
)/0.30+0.7 =5.6Vrms @4.5V V
Figure 3 - Circuit to Detect Line Reversal, Ring Burst and Ringing
V2
DD
V1
DD
R1=499K
=5.5V.
R2=499K
=4.5V.
SS
V4
is:
V3
T+
(see DC electrical characteristics).
DD
Zarlink Semiconductor Inc.
R3=200K
MT88E43B
To Microcontroller
4
TRIGRC
TRIGout
TRIGin
To determine values for C3 and R5:
R5C3=-t / ln(1-V
MT88E43
max V
min V T+ = 0.48 V
TRIGRC
T+
V
/V
DD
= 0.68 V
DD
)
DD
DD
Data Sheet
SS
to above