AD8561ARZ Analog Devices Inc, AD8561ARZ Datasheet - Page 2

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AD8561ARZ

Manufacturer Part Number
AD8561ARZ
Description
Comparator Single ±5V/10V 8-Pin SOIC N
Manufacturer
Analog Devices Inc
Type
General Purposer
Datasheets

Specifications of AD8561ARZ

Package
8SOIC N
Typical Voltage Gain Range
40 to 70 dB
Output Type
Complementary
Number Of Channels Per Chip
1
Minimum Single Supply Voltage
3 V
Power Supply Type
Single|Dual
Number Of Elements
1
Voltage - Supply
3 V ~ 10 V, ±1.5 V ~ 5 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Number Of Elements
1
Input Offset Voltage
7@5VmV
Input Bias Current (typ)
3uA
Response Time
7ns
Single Supply Voltage (typ)
5/9V
Dual Supply Voltage (typ)
±3V
Supply Current (max)
6@5VmA
Common Mode Rejection Ratio
85dB
Voltage Gain In Db
69.54dB
Power Supply Rejection Ratio
65dB
Power Supply Requirement
Single/Dual
Single Supply Voltage (min)
3V
Single Supply Voltage (max)
10V
Dual Supply Voltage (min)
±1.5V
Dual Supply Voltage (max)
±5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Amplifier Type
Comparator
Current, Input Bias
-3 μA
Current, Input Offset
±4 μA
Current, Supply
-2.3 to +4.5 mA
Impedance, Thermal
158 °C/W
Propagation Delay
6.75 ns
Temperature, Operating, Range
-40 to +85 °C
Time, Fall
1.5 ns
Time, Rise
3.8 ns
Voltage, Gain
3000 V/V
Voltage, Input
±7 V
Voltage, Input Offset
2.3 mV
Voltage, Supply
3 to 10 V
Comparator Type
High Speed
No. Of Comparators
1
Ic Output Type
CMOS, Push Pull, TTL
Supply Current
4.5mA
Supply Voltage Range
2.7V To 6V, 4.5V To 5.5V
Rohs Compliant
Yes
Output Compatibility
TTL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q2653769

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ELECTRICAL SPECIFICATIONS
Parameter
INPUT CHARACTERISTICS
LATCH ENABLE INPUT
DIGITAL OUTPUTS
DYNAMIC PERFORMANCE
POWER SUPPLY
NOTES
1
Specifications subject to change without notice.
AD8561–SPECIFICATIONS
Guaranteed by design.
Offset Voltage
Offset Voltage Drift
Input Bias Current
Input Offset Current
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance
Logic “1” Voltage Threshold
Logic “0” Voltage Threshold
Logic “1” Current
Logic “0” Current
Latch Enable
Logic “1” Voltage
Logic “1” Voltage
Logic “0” Voltage
Propagation Delay
Propagation Delay
Differential Propagation Delay
Power Supply Rejection Ratio
Positive Supply Current
Ground Supply Current
Analog Supply Current
Pulsewidth
Setup Time
Hold Time
(Rising Propagation Delay vs.
Falling Propagation Delay)
Fall Time
Rise Time
Symbol
V
I
I
I
V
CMRR
A
C
V
V
I
I
t
t
t
V
V
V
t
t
PSRR
I+
I
I–
PW(E)
S
H
P
P
B
B
OS
IH
IL
GND
V
t
OS
CM
VO
IH
IL
OH
OH
OL
IN
P
(@ V+ = +5.0 V, V– = V
OS
/ T
Conditions
–40 C
V
–40 C
V
0 V V
R
V
V
I
I
I
200 mV Step with 100 mV Overdrive
–40 C
100 mV Step with 5 mV Overdrive
100 mV Step with 100 mV Overdrive
20% to 80%
80% to 20%
+4.5 V V+
–40 C
V
–40 C
–40 C
OH
OH
OL
CM
CM
L
LH
LL
O
= 10 k
= 0 V, R
= 3.2 mA, V
= –50 A, V
= –3.2 mA, V
= 0.3 V
= 3.0 V
= 0 V
= 0 V
CM
–2–
T
T
T
T
T
T
A
A
A
A
A
A
GND
L
+3.0 V
=
= 0 V, T
+85 C
+85 C
+85 C
+85 C
+85 C
+85 C
+5.5 V
IN
IN
IN
> 250 mV
> 250 mV
A
> 250 mV
= +25 C unless otherwise noted)
1
Min
–6
–7
0.0
65
2.0
–1.0
–4
3.5
2.4
50
Typ
2.3
4
–3
–3.5
85
3000
3.0
1.65
1.60
–0.3
–2
6
1
1.2
3.5
0.25
6.75
8
8
0.5
3.8
1.5
65
4.5
2.2
2.3
Max
7
8
+3.0
0.8
0.4
9.8
13
2.0
6.0
7.5
3.3
3.8
4.5
5.5
4
REV. 0
Units
mV
mV
V
dB
V/V
pF
V
V
ns
ns
ns
V
V
V
ns
ns
ns
ns
ns
ns
dB
mA
mA
mA
mA
mA
mA
V/ C
A
A
A
A
A

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