IRFU9310PBF Vishay, IRFU9310PBF Datasheet - Page 7

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IRFU9310PBF

Manufacturer Part Number
IRFU9310PBF
Description
MOSFET P-CH 400V 1.8A I-PAK
Manufacturer
Vishay
Datasheets

Specifications of IRFU9310PBF

Transistor Polarity
P-Channel
Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
7 Ohm @ 1.1A, 10V
Drain To Source Voltage (vdss)
400V
Current - Continuous Drain (id) @ 25° C
1.8A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
13nC @ 10V
Input Capacitance (ciss) @ Vds
270pF @ 25V
Power - Max
50W
Mounting Type
Through Hole
Package / Case
IPak, TO-251, DPak, VPak (3 straight leads + tab)
Minimum Operating Temperature
- 55 C
Configuration
Single
Resistance Drain-source Rds (on)
7 Ohm @ 10 V
Drain-source Breakdown Voltage
400 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
1.8 A
Power Dissipation
50000 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
Through Hole
Continuous Drain Current Id
-1.8A
Drain Source Voltage Vds
-400V
On Resistance Rds(on)
7ohm
Rds(on) Test Voltage Vgs
-10V
Threshold Voltage Vgs Typ
-4V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
*IRFU9310PBF
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91284.
Document Number: 91284
S10-1139-Rev. C, 17-May-10
Re-applied
voltage
Reverse
recovery
current
+
R
-
g
D.U.T.
• Compliment N-Channel of D.U.T. for driver
Note
a. V
Note
D.U.T. V
Driver gate drive
D.U.T. l
Inductor current
GS
= - 5 V for logic level and - 3 V drive devices
P.W.
SD
DS
IRFR9310, IRFU9310, SiHFR9310, SiHFU9310
waveform
waveform
Peak Diode Recovery dV/dt Test Circuit
Body diode forward drop
Ripple ≤ 5 %
Period
Body diode forward
+
-
Fig. 14 - For P-Channel
• dV/dt controlled by R
• I
• D.U.T. - device under test
current
Diode recovery
SD
controlled by duty factor “D”
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
dV/dt
current transformer
dI/dt
D =
-
g
Period
P.W.
+
I
V
SD
V
GS
DD
= - 10 V
+
-
V
DD
a
Vishay Siliconix
www.vishay.com
7

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