TDA8754HL17BE-S NXP Semiconductors, TDA8754HL17BE-S Datasheet - Page 37

• Manufacturer Part Number: TDA8754HL17BE-S
• Description: Video ICs TRPL 8BIT VIDEO ADC
• Manufacturer: NXP Semiconductors

Specifications of TDA8754HL17BE-S

• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current: 180 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-486
• Available Set Gain: 6 dB
• Bandwidth: 700 MHz
• Conversion Rate: 170 msps
• Maximum Power Dissipation: 1.3 W
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 3
• Resolution: 8 bit
• Snr: 48 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: TDA8754HL/17/C1,55

Philips Semiconductors
Table 58:
Table 59:
Table 60:
Table 61:
Table 62:
9397 750 14984
Product data sheet
Bit
1
0
Bit
7 to 2
1
0
Bit
7 to 4
3
2
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
CLKOUTPUT - clock output register (address 1Ah) bit description
INTOSC - internal oscillator register (address 1Bh) bit allocation
INTOSC - internal oscillator register (address 1Bh) bit description
PWRMGT - power management register (address 1Eh) bit allocation
PWRMGT - power management register (address 1Eh) bit description
Symbol
OUTOSCILL
CKOENRGB
Symbol
-
SWITCHOSC
INTOSCOFF
Symbol
-
SHCKDMX
SHCKADC
9.20 Internal oscillator register
9.21 Power management register
W
X
7
-
W
X
7
-
W
X
6
-
Description
enables pin CKDATA to be switched with a multiplexer to have signal Ckdata or the internal
oscillator on the output
enables the output CKDATA to be set to high-impedance
Description
not used
enables a multiplexer to be switched; signal insertion on the input of the separator and
coast block, between the internal oscillator and pin CKEXT
disables the internal oscillator for the separator function, the coast gate and activity
detection
Description
not used
test bits; should be set to logic 0 for proper operation
test bits; should be set to logic 1 for better performances
W
X
6
-
0 = Ckdata
1 = for test
0 = active signal
1 = high-impedance
0 = normal case; if this bit is switched from logic 1 to logic 0, then an internal reset of the
coast, activity detection and sync separator is done
1 = test mode
0 = active; if this bit is switched from logic 1 to logic 0, then an internal reset of the coast,
activity detection and sync separator is done
1 = disabled
W
X
5
-
W
X
5
-
Rev. 06 — 16 June 2005
W
X
4
-
W
4
X
-
SHCKDMX
W
X
3
-
W
3
0
Triple 8-bit video ADC up to 270 Msps
…continued
SHCKADC
W
X
2
-
W
2
0
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SWITCHOSC INTOSCOFF
W
1
0
STBY
W
1
0
TDA8754
DVIRGB
W
0
0
W
0
0
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