DS1841N+ Maxim Integrated Products, DS1841N+ Datasheet - Page 11

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DS1841N+

Manufacturer Part Number
DS1841N+
Description
Digital Potentiometer ICs IC RES LOG NV I2C 5.5V
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS1841N+

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register 03h: Control Register 1 (CR1)
Register 08h: LUT Address Register (LUTAR)
Register 09h: LUT Value Register (WR*)
03h
08h
09h
FACTORY DEFAULT
MEMORY TYPE
Bit 7
Bits 7 to 2
Bit 1
Bit 0
Control Register 1 controls how the wiper position is determined. The
are stored in EEPROM or in Shadowed SRAM. On power-up, the EEPROM value is recalled to this register, regardless of
the state of
While the registers other than 00h through 0Ah can be read, they are not updated by the ADC as the ADC is disabled
with the Update Mode bit = 0.
FACTORY DEFAULT
POR DEFAULT
MEMORY TYPE
Bit 7
The LUTAR register serves as the index pointer to choose the corresponding temperature slot in the LUT based on the
internal temperature sensor result. The LUTAR can be directly read by acessing address 08h; however, to write an new
value to LUTAR (to control WR manually), the LUTAR Mode bit must be set to a 1.
FACTORY DEFAULT
MEMORY TYPE
Bit 7
WR serves as an intermediate location, which is populated automatically with the results of the temperature-indexed
lookup. The WR can be directly read by acessing address 09h; however to write an new value to WR (to control it
manually), the wiper access control bit must be set to a 1. WR is an unsigned 7-bit value.
*WR is updated every t
Reserved
______________________________________________________________________________________
Reserved.
Adder Mode This bit is valid only if the Update Mode bit = 1.
0 = The LUTVAL or IVR value is directly loaded to WR though the mux.
1 = (Default) The LUTVAL is summed with the IVR value and is directly loaded to WR though the mux.
Update Mode
0 = CR0 is enabled. During power-up the IVR value is loaded into the WR to set the wiper position.
Updates to Temperature Result (0Ch) and Supply Voltage Result (0Eh) are halted.
1 = (Default) The WR is controlled directly by I
is controlled by the temperature-compensation/LUT circuitry. If temperature compensation is enabled,
one of the 72 temperature slots is selected (by the LUTAR) and this slot value is copied into the
LUTVAL, which in turn sets the WR. Updates to Temperature Result (0Ch) and Supply Voltage Result
(0Eh) are enabled.
.
Reserved
FRAME
if Update Mode bit = 1. If Update Mode bit = 0, WR holds the value stored in register 00h.
03h
Shadowed NV
00h
00h until t
Volatile
00h
Volatile
Reserved
Temperature-Controlled, NV, I
FRAME
Reserved
LUTAR
WR*
2
C communication though registers 08h or 09h, or the WR
Reserved
Logarithmic Resistor
bit controls whether the values of this register
Reserved
Adder Mode
Update Mode
2
Bit 0
Bit 0
Bit 0
C,
11

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