LAN9115-MD SMSC, LAN9115-MD Datasheet - Page 91

• Manufacturer Part Number: LAN9115-MD
• Description: Ethernet ICs Efficient Sngl Chip 10/100 Ethrnt
• Manufacturer: SMSC
• Type: Single Chip MAC and PHYr

Specifications of LAN9115-MD

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9115
5.3.18
5.3.19
BITS
BITS
31:0
31-0
DESCRIPTION
Free Running SCLK Counter (FR_CNT):
Note:
Note:
DESCRIPTION
RX Dropped Frame Counter (RX_DFC). This counter is incremented every
time a receive frame is dropped. RX_DFC is cleared on any read of this
register.
An interrupt can be issued when this counter passes through its halfway
point (7FFFFFFFh to 80000000h).
FREE_RUN—Free-Run 25MHz Counter
This register reflects the value of the free-running 25MHz counter.
RX_DROP– Receiver Dropped Frames Counter
This register indicates the number of receive frames that have been dropped.
Offset:
Offset:
This field reflects the value of a free-running 32-bit counter. At reset
the counter starts at zero and is incremented for every 25MHz
cycle. When the maximum count has been reached the counter will
rollover. Since the bus interface is 16-bits wide, and this is a 32-
bit counter, the count value is latched on the first read. The
FREE_RUN counter can take up to 160nS to clear after a reset
event.
This counter will run regardless of the power management states
D0, D1 or D2.
9Ch
A0h
DATASHEET
91
Size:
Size:
32 bits
32 bits
TYPE
TYPE
RO
RC
Revision 1.5 (07-11-08)
00000000h
DEFAULT
DEFAULT
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