SI2434-FT Silicon Laboratories Inc, SI2434-FT Datasheet - Page 52
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SI2434-FT
Manufacturer Part Number
SI2434-FT
Description
Telecom ICs CONTACT SILICON LABS FOR AVAILABILITY
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI2415FS18-EVB.pdf
(74 pages)
Specifications of SI2434-FT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI2434-FT
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Si2457/34/15/04
U67 ITC1
Reset settings = 0x0008
52
15:14 Reserved Read returns zero.
13:12 MINI[1:0] Minimum Operational Loop Current.
11:10 Reserved Read returns zero
Name
Type
Bit
5:4
3:2
Bit
9
8
7
6
Reserved Read returns zero.
Reserved Read returns zero.
DCV[1:0] TIP/RING Voltage Adjust.
D15 D14 D13 D12 D11
Name
DCR
OHS
ILIM
Adjusts the minimum loop current at which the DAA can operate. Increasing the minimum oper-
ational loop current can improve signal headroom at a lower TIP/RING voltage.
Current Limiting Enable.
0 = Current limiting mode disabled.
1 = Current limiting mode enabled. This mode limits loop current to a maximum of 60 mA per
the TBR21 standard.
DC Impedance Selection.
0 = Normal dc impedance. This mode should be used for all standard
applications.
1 = 800 Ω dc termination.
On-Hook Speed.
This bit works in combination with the OHS2 bit (U62, bit 8) to set the on-hook speed. The on-
hook speeds are measured from the time the OH bit is cleared until loop current equals zero.
These bits adjust the voltage on the DCT pin of the line-side device, which affects the TIP/RING
voltage on the line. Low voltage countries should use a lower TIP/RING voltage. Raising the
TIP/RING voltage can improve signal headroom.
MINI[1:0]
DCV[1:0]
OHS
MINI[1:0]
00
01
10
11
00
01
10
11
1
0
0
R/W
OHS2
Min Loop Current
DCT Pin Voltage
0
1
X
3.1 V
3.2 V
3.35 V
3.5 V
10 mA
12 mA
14 mA
16 mA
D10
Mean On-Hook Speed
Less than 0.5 ms
3 ms ±10% (meets ETSI standard)
26 ms ±10% (meets Australia spark quenching spec)
ILIM
R/W
D9
Rev. 1.1
D8
DCR OHS
R/W
D7
Function
R/W
D6
D5
D4
D3
DCV[1:0]
R/W
D2
R/W
RZ
D1
R/W
RT
D0