CS8900A-CQ3 Cirrus Logic Inc, CS8900A-CQ3 Datasheet - Page 47

• Manufacturer Part Number: CS8900A-CQ3
• Description: Ethernet ICs IC 10Mbps Ethernet Controller 3.3V
• Manufacturer: Cirrus Logic Inc

Specifications of CS8900A-CQ3

• Ethernet Connection Type: 10Base- 2, 10Base- 5, 10Base- F, 10Base- T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Data Rate: 10 Mbps
• Maximum Operating Temperature: + 70 C
• Package / Case: LQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS271F5
The lower three bytes (0030h, 0031h, and 0032h) of the Boot PROM Base Address register are used for the 20-bit
Boot PROM base address. The upper three nibbles are reserved. See Section 3.6 on page 26.
After reset, if no EEPROM is found by the CS8900A, then the register has the following initial state. If an EEPROM
is found, then the register's initial value may be set by the EEPROM. See Section 3.3 on page 19.
Reset value is: XXXX XXXX XXXX 0000 0000 0000 0000 0000
4.3.10 Boot PROM Address Mask
(Read/Write, Address: PacketPage base + 0034h)
The Boot PROM address mask register indicates the size of the attached Boot PROM and is limited to 4K bit incre-
ments. The lower 12 bits of the Address Mask are ignored, and should be 000h. The next lowest-order bits describe
the size of the PROM. The upper three nibbles are reserved.
For example:
See Section 3.6 on page 26.
After reset, if no EEPROM is found by the CS8900A, then the register has the following initial state. If an EEPROM
is found, then the register's initial value may be set by the EEPROM. See Section 3.3 on page 19.
Reset value is: XXXX XXXX XXXX 0000 0000 0000 0000 0000
4.3.11 EEPROM Command
(Read/Write, Address: PacketPage base + 0040h)
This register is used to control the reading, writing and erasing of the EEPROM. See Section 3.5.
ADD7-ADD0
OB1,OB0
ELSEL
Reserved
CS8900A
Crystal LAN™ Ethernet Controller
7
F
Address 0037h
Reserved
Size of Boot PROM
ELCS pin is used to select the external LA decode circuit.
Address of the EEPROM word being accessed.
Indicates the Opcode of the command being executed. See Table 8.
External logic select: When clear, the EECS pin is used to select the EEPROM. When set, the
Reserved and must be written as 0.
E
6
16k bits
4k bits
8k bits
The most significant nibble of
Boot PROM mask address.
Reserved
The high-order nibble is
D
5
CIRRUS LOGIC PRODUCT DATASHEET
Address 0036h
reserved.
XXXX XXXX XXXX 1111 1100 0000 0000 0000
XXXX XXXX XXXX 1111 1111 0000 0000 0000
XXXX XXXX XXXX 1111 1110 0000 0000 0000
C
4
ADD7 to ADD0
Contains portion of Boot PROM
mask address. The lower-order
nibble must be written as 0h.
Register value
B
3
Address 0035h
ELSEL
A
2
address. Must be written as
The least significant byte of
the Boot PROM mask
OB1
1
9
Address 0034h
00h.
OB0
0
8
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