LAN83C185-JD SMSC, LAN83C185-JD Datasheet - Page 8

• Manufacturer Part Number: LAN83C185-JD
• Description: Ethernet ICs Lo Pwr 10/100 3.3V PHY
• Manufacturer: SMSC

Specifications of LAN83C185-JD

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Transceivers
• Number Of Transceivers: 1
• Standard Supported: 100BASE-TX, 10BASE-T
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 1 mA, 19 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 1 General Description
Revision 0.8 (06-12-08)
1.1
TXD[0..3]
RXD[0..3]
nRESET
RX_CLK
TX_CLK
MODE0
MODE1
MODE2
RX_DV
RX_ER
TX_EN
TX_ER
MDIO
MDC
CRS
COL
Architectural Overview
The SMSC LAN83C185 is a low-power, highly integrated analog interface IC for high-performance
embedded Ethernet applications. The LAN83C185 requires only a single +3.3V supply.
The LAN83C185 consists of an encoder/decoder, scrambler/descrambler, transmitter with wave-
shaping and output driver, twisted-pair receiver with on-chip adaptive equalizer and baseline wander
(BLW) correction, clock and data recovery, and Media Independent Interface (MII).
The LAN83C185 is fully compliant with IEEE 802.3/ 802.3u standards and supports both 802.3u-
compliant and vendor-specific register functions. It contains a full-duplex 10-BASET/100BASE-TX
transceiver and supports 10-Mbps (10BASE-T) operation on Category 3 and Category 5 unshielded
twisted-pair cable, and 100-Mbps (100BASE-TX) operation on Category 5 unshielded twisted-pair
cable.
MODE Control
SMI
100M Rx
10M Rx
Logic
Logic
Management
Regulator
Control
Figure 1.1 LAN83C185 Architectural Overview
1.8V
Receive Section
Data Recovery
DSP System:
Equalizer
10M PLL
High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Clock
DATASHEET
Negotiation
100M PLL
Auto-
8
Analog-to-
Squelch &
Digital
Filters
100M Tx
10M Tx
Logic
Logic
Transmit Section
Generator
Interrupt
Address
Latches
Central
PHY
Bias
Transmitter
Transmitter
100M
10M
GPO Circuitry
LED Circuitry
PLL
SMSC LAN83C185
nINT
RXP / RXN
PHYAD[0..4]
GPO0
GPO1
GPO2
TXP / TXN
XTAL1
XTAL2
SPEED100
LINKON
ACTIVITY
FDUPLEX
Datasheet