SI5010-BMR Silicon Laboratories Inc, SI5010-BMR Datasheet - Page 6

• Manufacturer Part Number: SI5010-BMR
• Description: Telecom ICs SONET/SDH 2.5 V OC-3/12 STM-1/4
• Manufacturer: Silicon Laboratories Inc
• Type: OC-12/3, STM-4/1 Sonet/SDH Clock and Data Recovery Icr

Specifications of SI5010-BMR

• Operating Supply Voltage: 2.375 V to 2.625 V
• Supply Current: 124 mA
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Operating Frequency: 19.44 MHz
• Package / Case: MLP-20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2. DC Characteristics
(V
Si5010
6
Parameter
Supply Current
OC-12
OC-3
Power Dissipation
OC-12
OC-3
Common Mode Input Voltage
Single Ended Input Voltage
Differential Input Voltage Swing*
(DIN, REFCLK)
Input Impedance (DIN, REFCLK)
Differential Output Voltage Swing
(DOUT)
Differential Output Voltage Swing
(CLKOUT)
Output Common Mode Voltage
(DOUT,CLKOUT)
Output Impedance (DOUT,CLKOUT)
Output Short to GND (DOUT,CLKOUT)
Output Short to V
Input Voltage Low (LVTTL Inputs)
Input Voltage High (LVTTL Inputs)
Input Low Current (LVTTL Inputs)
Input High Current (LVTTL Inputs)
Output Voltage Low (LVTTL Outputs)
Output Voltage High (LVTTL Outputs)
Input Impedance (LVTTL Inputs)
PWRDN/CAL Leakage Current
*Note: The DIN and REFCLK inputs may be driven differentially or single-endedly. When driving single-endedly, the voltage
DD
= 2.5 V ±5%, T
swing of the signal applied to the active input must exceed the specified minimum differential input voltage swing (V
min) and the unused input must be ac-coupled to ground. When driving differentially, the difference between the positive
and negative input signals must exceed V
either case, the voltage applied to any individual pin (DIN+, DIN–, REFCLK+, or REFCLK–) must not exceed the
specified maximum Input Voltage Range (V
DD
A
= –40°C to 85°C)
(DOUT,CLKOUT)
(DIN, REFCLK)
(DIN, REFCLK)
ID
IS
min. (Each individual input signal needs to swing only half of this range.) In
Symbol
I
max).
PWRDN
V
R
I
I
V
V
V
V
SC(–)
SC(+)
V
R
R
I
V
V
V
P
V
OCM
I
DD
OUT
I
ICM
OD
OD
IH
OH
IL
OL
IS
ID
IH
IN
IL
IN
D
Rev. 1.4
V
Test Condition
varies with V
Single-ended
PWRDN
See Figure 1
See Figure 1
Line-to-Line
Line-to-Line
Line-to-Line
Line-to-Line
100 Ω Load
100 Ω Load
100 Ω Load
I
I
O
O
= 2 mA
= 2 mA
≥ 0.8 V
DD
–17.5
Min
200
200
780
780
2.0
2.0
84
84
10
15
—
—
—
—
—
—
—
—
—
—
—
.80 x V
V
–14.5
Typ
117
124
293
310
100
970
970
0.23
100
DD
25
25
—
—
—
—
—
—
—
—
—
–
DD
1500
1260
1260
Max
131
138
344
362
750
116
116
0.4
31
10
10
35
—
—
—
—
—
—
.8
mV
mV
mV
mV
Unit
mW
mA
mA
mA
μA
μA
kΩ
μA
Ω
Ω
V
V
V
V
V
V
ID
PP
PP
PP
PP