CS61535A-IL1Z Cirrus Logic Inc, CS61535A-IL1Z Datasheet

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... Applications • Interfacing network transmission equipment such as SONET multiplexor and M13 to a DSX-1 cross connect. • Interfacing customer premises equipment to a CSU. • Interfacing to E1 links. Ordering Information CS61535A-IL1Z CS61535A-IL1 (CLKE) XTALIN XTALOUT MODE TAOS JITTER ...

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... Assumes 50% ones density and 300ft. line length at 5.0V. 2 Symbol Min RV+ - TV+ - (Note 1) V RGND-0.3 in (Note -65 stg Symbol Min (Note 3) RV+, TV+ 4.75 T -40 A (Notes (Notes CS61535A Max Units 6.0 V (RV+) + 0.3 V (RV °C 85 °C 150 Typ Max Units 5.0 5.25 V ° 290 350 mW 175 - mW DS40F3 ...

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... Notes: 7. This specification guarantees TTL compatibility ( Host Mode, pin open drain output and pin tristate output. 9. Pins 17 and 18 of the CS61535A are digital inputs in the Extended Hardware Mode. 10. Output drivers will drive CMOS logic levels into a CMOS load. 11 alternative to supplying a 2.3-to-2.7V input, this pin may be left floating. ...

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... Transmitter Short Circuit Current Notes: 16. Using a 0.47 μF capacitor in series with the primary of a transformer recommended in the Applications Section. 17. Amplitude measured at the transformer (CS61535A-1:1 or 1:1.26) output across a 75 Ω load for line length setting LEN2/1/0 = 0/0/0. 18. Amplitude measured at the transformer (CS61535A-1:1.26) output across a 120 Ω ...

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... TV+, RV+ = 5.0V ±5%; GND = 0V) Min - - -13.6 60 (Note 24) 53 (Note 25) 45 (Note 26 160 (Note 27) 0.4 6.0 300 (Note 28) 0. 1.2 V and from CS61535A Typ Max Units 0. Ω 50k - - - peak peak peak peak peak 175 190 bits - - ...

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... The maximum gap size that can pw2 t pw1 t pwl1 t pwh1 t t su1 h1 CS61535A Min Typ Max - 6.176000 pw3 - 1.544 / pw1 - 29 320 648 980 130 190 240 100 ...

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... Figure 2. Signal Rise and Fall Characteristics t h2 ACLKI Figure 3b. Alternate External Clock Characteristics CS61535A Min Typ Max f - 8.192000 pw3 - 2.048 / pw1 310 488 670 90 ...

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... SDI LSB CONTROL 8 (TA = -40° to 85°C; TV+, RV+ = ±5%; Symbol cdh (Note 38) t cch t cwh (Note 39) t cdv t cdz t su4 pcsl t cl LSB BYTE DATA Figure 4. Serial Port Write Timing Diagram CS61535A Min Typ Max 240 - - 240 - - - - 250 - - - - 200 - 100 - ...

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... CS SCLK t SDO CLKE = 1 LEN0/1/2, TAOS, RLOOP, LLOOP, RCODE, TCODE Figure 6. Extended Hardware Mode Parallel Chip Select Timing Diagram DS40F3 cdv Figure 5. Serial Port Read Timing Diagram PCS t su4 t pcsl VALID INPUT DATA CS61535A t cdz HIGH ...

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... THEORY OF OPERATION Enhancements in CS61535A • • • • • • • • Ω Ω Introduction to Operating Modes MODE EXTENDED HARDWARE HARDWARE MODE-PIN FLOAT, or <0.2V INPUT LEVEL 2.5V INDIVIDUAL CONTROL INDIVIDUAL CONTROL LINES & CONTROL METHOD PARALLEL LINES CHIP SELECT LINE CODE AMI, ENCODER & ...

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... AMI CS61535A AIS LINE RECEIVER DETECT AIS HOST MODE CLKE CONTROL JITTER LINE DRIVER ATTENUATOR CS61535A DRIVER MONITOR LINE RECEIVER Figure 7. Overview of Operating Modes CS61535A TTIP TRANSMIT TRING TRANSFORMER MRING MTIP DPM RTIP RECEIVE RRING TRANSFORMER LEN0/1/2 TTIP TRANSMIT TRING TRANSFORMER ...

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... FEET 266-399 FEET 399-533 FEET 533-655 FEET AT&T CB113 (CS61535A only CCITT G.703 FCC Part 68, Option ANSI T1.403 Table 3. Line Length Selection Nominal peak voltage of a mark (pulse) Peak voltage of a space (no pulse) Nominal pulse width Ratio of the amplitudes of positive and negative ...

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... Figure 9 . Mask of the Pulse at the 2048 kbps Interface Jitter Attenuator DS40F3 Maximum Attenuation Limit Figure 10. Typical Jitter Attenuation Curve Nominal Pulse Jitter Tolerance of Jitter Attenuator CS61535A a) Minimum Attenuation Limit AT&T 62411 Requirements Measured Performance 10 100 Frequency ...

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... Appendix A Transmit All Ones Select 14 Data Data Sampling Level & Slicer Clock Extraction Clock Edge Phase Detector Selector Continuously Calibrated Delay Line Figure 11. Receiver Block Diagram Receiver CS61535A RPOS RNEG RCLK ACLKI or Oscillator in Jitter Attenuator DS40F3 ...

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... DS40F3 MODE (pin 5) LOW (<0.2V) HIGH (>(V+) - 0.2V) HIGH (>(V+) - 0.2V) MIDDLE (2.5V Don’t care Jitter and Recovered Clock 700 1k 10k 100k CS61535A CLKE DATA CLOCK (pin 28) X RPOS RCLK RNEG RCLK LOW RPOS RCLK RNEG RCLK SDO SCLK HIGH ...

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... Loss of Signal 16 Local Loopback Remote Loopback CS61535A DS40F3 ...

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... TCODE HDB3 LOW (Transmit Encoder Encoder HIGH Selection) RCODE HDB3 LOW (Receiver Decoder Decoder HIGH Selection) Table 6. Selection of Encoder/Decoder Alarm Indication Signal Parallel Chip Select Power On Reset / Reset CS61535A LEN 2/1/0 010-111 B8ZS Encoder AMI Encoder B8ZS Decoder AMI Decoder 17 ...

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... CS SCLK SDI R Address/Command Byte SDO Serial Interface Figure 13. Input/Output Timing LSB, first bit Table 7. Address/Command Byte CS61535A Data Input/Output Read/Write Select write R/W read 1 ADD0 LSB of address, Must ADD1 Must ADD2 Must ADD3 Must ADD4 Must Reserved - Must be 0 DS40F3 ...

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... LLOOP in effect. TAOS/LLOOP in effect. RLOOP in effect DPM changed state since last "clear DPM" occured. LOS changed state since last "clear LOS" occured. LOS and DPM have changed state since last "clear LOS" and "clear DPM". Table 10. Coding for Serial Output Bits CS61535A 19 ...

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... Power Supply μ μ μ 20 Schematic & Layout Review Service Confirm Optimum Schematic & Layout Before Building Your Board. For Our Free Review Service Call Applications Engineering CS61535A DS40F3 ...

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... RPOS RGND 7 22 RCLK RV XTALIN RRING 9 20 XTALOUT RTIP 10 19 DPM MRING 11 18 LOS MTIP 12 17 TTIP TRING 13 16 TGND TV top 8 view DPM LOS TTIP CS61535A TAOS LLOOP RLOOP LEN2 25 LEN1 24 LEN0 23 22 RGND 21 RV RRING RTIP MRING MTIP TRING TV+ 21 ...

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... RGND 7 22 RCLK RV XTALIN RRING 9 20 XTALOUT RTIP 10 19 AIS PCS 11 18 LOS RCODE 12 17 TTIP TRING 13 16 TGND TV BPV top 8 view AIS LOS TTIP CS61535A TAOS LLOOP RLOOP LEN2 25 LEN1 24 LEN0 23 22 RGND 21 RV RRING RTIP PCS RCODE TRING TV+ DS40F3 ...

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... RPOS RGND 7 22 RCLK RV XTALIN RRING 9 20 XTALOUT RTIP 10 19 DPM MRING 11 18 LOS MTIP 12 17 TTIP TRING 13 16 TGND TV top 8 view DPM LOS TTIP CS61535A CLKE SCLK CS SDO 25 SDI 24 INT 23 22 RGND 21 RV RRING RTIP MRING MTIP TRING TV+ 23 ...

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... TV+ - Power Supply, Transmit Driver, Pin 15. Oscillator XTALIN, XTALOUT - Crystal Connections, Pins 9 and 10. specifications. Control ACLKI - Alternate External Clock Input, Pin 1. CLKE - Clock Edge, Pin 28. (Host Mode Chip Select, Pin 26. (Host Mode) INT - Receive Alarm Interrupt, Pin 23. (Host Mode) 24 Ω See Appendix A for crystal CS61535A DS40F3 ...

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... PCS - Parallel Chip Select, Pin 18. (Extended Hardware Mode) RCODE - Receiver Decoder Select, Pin 17. (Extended Hardware Mode) RLOOP - Remote Loopback, Pin 26. (Hardware and Extended Hardware Modes) SCLK - Serial Clock, Pin 27. (Host Mode) SDI - Serial Data Input, Pin 24. (Host Mode) SDO - Serial Data Output, Pin 25. (Host Mode) DS40F3 CS61535A 25 ...

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... RTIP, RRING - Receive Tip, Receive Ring, Pins 19 and 20. TCLK - Transmit Clock, Pin 2. TDATA - Transmit Data, Pin 3. (Extended Hardware Mode) TPOS, TNEG - Transmit Positive Data, Transmit Negative Data, Pins 3 and 4. (Hardware and Host Modes) TTIP, TRING - Transmit Tip, Transmit Ring, Pins 13 and 16. Ω 26 CS61535A Applications DS40F3 ...

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... AIS - Alarm Indication Signal, Pin 11. (Extended Hardware Mode) BPV- Bipolar Violation Strobe, Pin 6. (Extended Hardware Mode) DPM - Driver Performance Monitor, Pin 11. (Hardware and Host Modes) LOS - Loss of Signal, Pin 12. MTIP, MRING - Monitor Tip, Monitor Ring, Pins 17 and 18. (Hardware and Host Modes) DS40F3 CS61535A 27 ...

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... 28-pin PLCC MILLIMETERS E E1 DIM MIN A 4.20 A1 2.29 B 0.33 D/E 12.32 D1/E1 11.43 D1 D2/ CS61535A MILLIMETERS INCHES DIM MIN NOM MAX MIN 3.94 4.32 A 5.08 0.155 A1 0.51 0.76 1.02 0.020 B 0.36 0.46 0.56 0.014 B1 1.02 1.27 1.65 0.040 C 0.20 ...

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... XTALIN 13 XTALOUT TTIP RGND TGND 22 14 FREQUENCY CABLE Ω MHz 1.544 100 2.048 120 2.048 75 Figure A1. Host Mode Configuration Selecting an Oscillator Crystal CS61535A +5V 100 kΩ μP Serial Port CT 2:1 R1 RECEIVE LINE R2 0.47 μF TRANSMIT LINE R1&2 Transmit Ω Transformer 200 1:1.15 240 1:1 ...

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... EXTENDED AIS HARDWARE 5 MODE MODE 20 4 RRING TCODE 7 RDATA 8 RCLK 3 TDATA 16 TRING 2 TCLK 13 TTIP 9 XTALIN 10 XTALOUT RGND TGND 22 14 CS61535A Line Length Setting CT 2:1 R1 RECEIVE LINE R2 0.47 μF TRANSMIT LINE Line Length Setting CT 2:1 R1 RECEIVE LINE R2 0.47 μF TRANSMIT LINE DS40F3 ...

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... SCLK TCLK TPOS SDO TPOS TNEG TNEG SDI 100k V+ MODE CS RNEG RNEG RPOS RPOS RCLK RCLK CS62180B Figure A4. Interfacing the CS61535A with the CS62180B (Host Mode) CS61534 Compatibility DS40F3 V+ 100k CLKE SCLK CS V+ SDO 22k SDI INT 0V 0.1uF 68uF RGND RV+ +5V ...

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... Using the CS61535A for SONET 51.84 MHz Empty TCLK1 FIFO 6480 to 193 bit TSER (or 256 bit) Mapping RSER Circuit FIFO RCLK1 32 Div By Write TCLK2 Clock TPOS TSER TNEG CS62180B RSER RPOS RNEG RCLK2 RCLK2 Figure A5. SONET Application CS61535A Jitter Driver Attenuator ...

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... Table A1. Locked VT FIFO Analysis CS61535A Receiver 1:2 CT ± 5% 600 μH min. @ 772 kHz 1.3 μH max. @ 772 kHz 0.4 μH max. @ 772 kHz 23 pF max. 16 V-μs min. for T1 12 V-μs min. for E1 Table A2. Transformer Specifications CS61535A Ω ...

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... T1 1:1.15 RX &TX: 1:2CT E1 (75 & 120 Ω) 1:1.26 1 1:2CT T1 & E1 TX: 1:1.26 E1 (75 & 120 Ω) 1:1 Table A3. Recommended Transformers For The CS61535A 34 Manufacturer Part Number Pulse Engineering PE-65351 Schott 67129300 Bel Fuse 0553-0013-HC Pulse Engineering PE-65388 Schott 67129310 Bel Fuse ...

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... Measured with Saunders 150D meter at 25 °C. DS40F3 Min (Note 1) = 11.6 pF (Note 2) 6.176803 6.175846 = 19.0 pF (Note 3) = 37.0 pF (Note 2) Min (Note 1) = 11.6 pF (Note 2) 8.192410 8.191795 = 19.0 pF (Note 3) = 37.0 pF (Note 2) CS61535A Typ Max - 370 390 - - 6.176000 6.176154 - - 6.175197 Typ Max - 210 245 - - 8.192000 8.192205 ...

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... Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. 36 Changes Removed development system info. (No longer supported). Removed PDIP option. Changed PLCC package option to lead-free. CS61535A DS40F3 ...