PI6C20400ALE Pericom Semiconductor, PI6C20400ALE Datasheet - Page 8

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PI6C20400ALE

Manufacturer Part Number
PI6C20400ALE
Description
Clock Buffer 1:4 PCI Express Gen 2 Zero Delay Buffer
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI6C20400ALE

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AC Switching Characteristics
Notes:
1. Test configuration is R
2. Measurement taken from Single Ended waveform.
3. Measurement taken from Differential waveform.
4. Measurement taken using M1 data capture analysis tool.
5. Additive jitter is calculated from input and output RMS phase jitter by using PCIe 2.0 filter. (T
Configuration Test Load Board Termination
F
T
DT
DT
T
T
V
V
V
DV
T
T
IN
rise
pd
jitter
DC
jadd
HIGH
LOW
cross
Symbol
rise
fall
cross
/ T
/
10-0181
fall
PLL Mode
Bypass Mode
Rise and Fall Time (measured between 0.175V to 0.525V)
Rise and Fall Time Variation
PLL Mode
Non-PLL Mode
Cycle – Cycle Jitter
Voltage High including overshoot
Voltage Low including undershoot
Absolute crossing point voltages
Total Variation of Vcross over all edges
Duty Cycle
Additive RMS phase jitter for PCIe 2.0
PI6C20400A
s
= 33.2Ω, Rp = 49.9Ω, and 2pF.
475Ω
1%
(V
DD
33Ω
33Ω
5%
49.9Ω
Rs
5%
Rs
= 3.3±5%, V
1%
Rp
Parameters
DD_A
49.9Ω
= 3.3±5%)
1%
Rp
8
TLA
TLB
1:4 Clock Driver for Intel PCIe® Chipsets
2pF
5%
jadd
= √(output jitter)
-300
Min
100
175
660
250
2.5
95
45
<0
OUT#
OUT
Max.
±250
1150
2pF
5%
105
400
700
125
550
140
6.5
50
55
1
2
– (input jitter)
PS9062
Units
MHz
MHz
PI6C20400A
mV
mV
mV
mV
ps
ps
ps
ns
ps
ps
%
2
Notes
3, 4
06/14/10
2
2
2
2
2
2
3
5

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