MCP79412T-I/MS Microchip Technology, MCP79412T-I/MS Datasheet - Page 19

Real Time Clock I2C GP RTCC 1Kb EE 64B SRAM EUI-64

MCP79412T-I/MS

Manufacturer Part Number
MCP79412T-I/MS
Description
Real Time Clock I2C GP RTCC 1Kb EE 64B SRAM EUI-64
Manufacturer
Microchip Technology
Series
-r
Type
Clock/Calendarr
Datasheet

Specifications of MCP79412T-I/MS

Function
Clock/Calendar
Rtc Memory Size
64 Byte
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Rtc Bus Interface
I2C
Supply Current
1 uA
Features
Alarm, Leap Year, NVSRAM, Square Wave Output, Unique ID
Memory Size
64B
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C
Voltage - Supply
1.8 V ~ 5.5 V
Voltage - Supply, Battery
1.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.2
5.2.1
Following the Start condition from the master, the
control code and the R/W bit (which is a logic low) are
clocked onto the bus by the master transmitter. This
indicates to the addressed slave receiver that a byte
with a word address will follow after it has generated an
Acknowledge bit during the ninth clock cycle.
Therefore, the next byte transmitted by the master is
the word address and will be written into the Address
Pointer of the MCP7941X. After receiving another
Acknowledge signal from the MCP7941X, the master
device transmits the data word to be written into the
addressed
acknowledges again and the master generates a Stop
condition. This initiates the internal write cycle, and,
during this time, the MCP7941X does not generate
Acknowledge signals for EEPROM write commands. If
an attempt is made to write to an address and the
protection is set then the device will acknowledge the
command but no write cycle will occur, no data will be
written, and the device will immediately accept a new
command. After a byte write command, the internal
address counter will point to the address location
following the one that was just written.
5.2.2
The write control byte, word address, and the first data
byte are transmitted to the MCP7941X in the same way
as in a byte write. But instead of generating a Stop
condition, the master transmits up to 7 additional bytes
(MCP7941X has an 8-byte page), which are
temporarily stored in the on-chip page buffer and will be
written into memory after the master has transmitted a
Stop condition. After receipt of each word, the three
lower Address Pointer bits are internally incremented
by one. If the master should transmit more than 8 bytes
prior to generating the Stop condition, the address
counter will roll over and the data received previously
will be overwritten. As with the byte write operation,
once the Stop condition is received, an internal write
cycle will begin
 2010-2011 Microchip Technology Inc.
EEPROM
EEPROM BYTE WRITE
EEPROM PAGE WRITE
memory
(Figure
5-4).
location.
The
MCP7941X
Note:
Note:
Page write operations are limited to writing
Addressing undefined EEPROM locations
bytes within a single physical page,
regardless of the number of bytes actually
being
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and end at addresses that are
integer multiples of [page size - 1]. If a
page write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
will
acknowledging the address.
result
transmitted.
in
MCP7941X
the
MCP7941X
Physical
DS22266C-page 19
page
not

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