SL2304NZZI-1Z Silicon Laboratories Inc, SL2304NZZI-1Z Datasheet - Page 7

• Manufacturer Part Number: SL2304NZZI-1Z
• Description: Clock Buffer 0-140MHz 4 Outputs Fanout Buffer 3.3V
• Manufacturer: Silicon Laboratories Inc

Specifications of SL2304NZZI-1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Electrical Characteristics (I-Grade and VDD=3.3V)
Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF and Ambient Temperature range -40 to +85°C
Output Frequency Range
Output Rise/fall Time
Output Rise/Fall Time
Input Duty Cycle
Output Duty Cycle
Output Duty Cycle
Output to Output Skew
Part to Part Skew
Propagation Delay Time
Cycle-to-Cycle Jitter
Cycle-to-Cycle Jitter
External Components & Design Considerations
Typical Application Schematic
Recommendations
Decoupling Capacitor: A decoupling capacitor of 0.1μF must be used between VDD and VSS pins. Place the
capacitor on the component side of the PCB as close to the VDD pin as possible. The PCB trace to the VDD pin and
to the GND via should be kept as short as possible. Do not use vias between the decoupling capacitor and the VDD
pin.
Rev 2.1, May 6, 2008
Description
Symbol
FOUT1
FOUT2
SKW1
SKW2
CCJ1
CCJ2
tr/f-1
tr/f-2
DC1
DC2
DC3
PDT
CL=15pF
CL=30pF
CL=15pF, measured at 0.8V to 2.0V
CL=30pF, measured at 0.8V to 2.0V
Measured at VDD/2
CL=15pF, Fout=140MHz
Measured at VDD/2
CL=30pF, Fout=100MHz
Measured at VDD/2
Measured at VDD/2 and
Outputs are equally loaded
Measured at VDD/2 and
Outputs are equally loaded
Measured at VDD/2 from CLKIN to
Output Clock rising edge and Outputs
are equally loaded
CLKIN=66MHz and CL=15
CLKIN=133MHz and CL=15
Condition
Min
DC
DC
1.2
20
45
40
–
–
–
–
–
–
Typ
120
2.5
60
80
60
–
–
–
–
–
–
–
SL2304NZ
Page 7 of 9
Max
140
100
120
240
160
120
2.2
2.6
3.8
80
55
60
Unit
MHz
MHz
ns
ns
ps
ps
ns
ps
ps
%
%
%