CS181002-CQR Cirrus Logic Inc, CS181002-CQR Datasheet - Page 17

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CS181002-CQR

Manufacturer Part Number
CS181002-CQR
Description
Audio DSPs IC CobraNet Audio Networking Processor
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS181002-CQR

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.0 Synchronization
5.1
DS651UM23
Version 2.3
DAC
Synchronization Modes
BeatReceived
RefClkPolarity
RefClkEnable
REFCLK_IN
MCLK_IN
MCLK_SEL
Figure 3
(CM-2). This circuitry allows the synchronization modes documented below to be
achieved. Modes are distinguished by different settings of the multiplexors and software
elements.
Clock synchronization mode for conductor and performer roles is independently
selectable via management interface variables syncConductorClock and
syncPerformerClock. The role (conductor or performer) is determined by the network
environment including the conductor priority setting of the device and the other devices on
the network. It is possible to ensure you will never assume the conductor role by selecting
a conductor priority of zero. However, it is not reasonable to assume that by setting a high
conductor priority, you will always assume the conductor role. For more information, refer
to CobraNet Programmer’s Reference Manual.
24.576 MHz
VCXO
shows clock related circuits for the CS1810xx/CS4961xx and board design
Detect
Edge
Figure 3. Audio Clock Sub-system
©
Copyright 2005 Cirrus Logic, Inc.
Legend:
Counter
AClkConfig
Sample
Phase
Component
Hardware
External
(CM2)
Detector
Phase
(CS1810xx, CS4961xx)
Generator
CobraNet Hardware User’s Manual
Audio
Clock
Component
Hardware
Internal
CS1810xx/CS4961xx
Loop
Filter
Synchronization
MCLK_OUT
Component
Software
SLCK
FS1
17

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