CS8420-CSR Cirrus Logic Inc, CS8420-CSR Datasheet - Page 42
CS8420-CSR
Manufacturer Part Number
CS8420-CSR
Description
Audio DSPs IC Digital Audio Sample Rate Convertr
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS8420-CSZ.pdf
(94 pages)
Specifications of CS8420-CSR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.12 Interrupt 2 Register Mask (0Ch)
10.13 Interrupt Register 2 Mode Registers MSB & LSB (0Dh,0Eh)
7
0
7
0
0
The bits of this register serve as a mask for the Interrupt 2 Register. If a mask bit is set to 1, the error is
considered unmasked, meaning that its occurrence will affect the INT pin and the status register. If a mask
bit is set to 0, the error is considered masked, meaning that its occurrence will not affect the INT pin or the
status register. The bit positions align with the corresponding bits in Interrupt Register 2. This register de-
faults to 00.
The two Interrupt mode registers form a 2-bit code for each Interrupt 2 register function. This code deter-
mines whether the INT pin is set active on the arrival of the interrupt condition, on the removal of the interrupt
condition, or on the continuing occurrence of the interrupt condition. These registers default to 00.
00 - Rising edge active
01 - Falling edge active
10 - Level active
11 - Reserved
6
0
6
0
0
VFIFOM
VFIFO1
VFIFO0
5
5
REUNLOCKM
REUNLOCK1
REUNLOCK0
4
4
DETUM
DETU1
DETU0
3
3
EFTUM
EFTU1
EFTU0
2
2
QCHM
QCH1
QCH0
1
1
CS8420
UOVWM
UOVW1
UOVW0
DS245F4
0
0
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