WM8973LGEFL/V Wolfson Microelectronics, WM8973LGEFL/V Datasheet - Page 23
![Audio CODECs Stereo Codec with H/P Spkr](/photos/16/2/160214/qfn-32_sml.jpg)
WM8973LGEFL/V
Manufacturer Part Number
WM8973LGEFL/V
Description
Audio CODECs Stereo Codec with H/P Spkr
Manufacturer
Wolfson Microelectronics
Datasheets
1.WM8973LGEFLV.pdf
(57 pages)
2.WM8973LGEFLV.pdf
(63 pages)
3.WM8973LGEFLV.pdf
(61 pages)
4.WM8973LGEFLV.pdf
(57 pages)
Specifications of WM8973LGEFL/V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Production Data
w
Table 10 ADC Signal Path Control
Table 11 ADC High Pass Filter Enable Modes
R5 (05h)
ADC and DAC
Control
R27 (1Bh)
REGISTER
ADDRESS
HPFLREN
0
0
1
1
6:5
4
0
5
BIT
ADCPOL
[1:0]
HPOR
ADCHPD
HPFLREN
ADCHPD
LABEL
0
1
0
1
00
0
0
0
DEFAULT
High-pass filter enabled on left and right
channels
High-pass filter disabled on left and right
channels
High-pass filter enabled on left channel,
disabled on right channel
High-pass filter disabled on left channel,
enabled on right channel
00 = Polarity not inverted
01 = L polarity invert
10 = R polarity invert
11 = L and R polarity invert
Store dc offset when high-pass
filter disabled
1 = store offset
0 = clear offset
ADC high-pass filter enable
(Digital)
HPFLREN = 0
1 = Disable high-pass filter on left
and right channels
0 = Enable high-pass filter on left
and right channels
HPFLREN = 1
0 = High-pass enabled on left,
disabled on right
1 = High-pass enabled on right,
disabled on left
ADC high-pass filter left or right
enable
0 = High-pass filter enable/disable
on left and right channels
controlled by ADCHPD
1 = High-pass filter enabled on left
or right channel, as selected by
ADCHPD
HIGH PASS MODE
PD Rev 4.2 September 2005
DESCRIPTION
WM8973L
23