LTC6900CS5 Linear Technology, LTC6900CS5 Datasheet - Page 5

• Manufacturer Part Number: LTC6900CS5
• Manufacturer: Linear Technology
• Type: Silicon Oscillatorr

Specifications of LTC6900CS5

• Mounting Style: Surface Mount
• Screening Level: Industrial
• Product Length (mm): 2.9mm
• Product Depth (mm): 1.75mm
• Product Height (mm): 0.9mm
• Package / Case: TSOT-23
• Lead Free Status / RoHS Status: Not Compliant

BLOCK DIAGRA
PI FU CTIO S
V
must be kept free from noise and ripple. It should be
bypassed directly to a ground plane with a 0.1 F capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane for
best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V
mines the oscillator frequency. The voltage on this pin is
held by the LTC6900 to approximately 1.1V below the V
voltage. For best performance, use a precision metal film
resistor with a value between 10k and 2M and limit the
capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the
value of N in the frequency equation. Pin 4 should be tied
to GND for the 1 setting, the highest frequency range.
+
(Pin 1): Voltage Supply (2.7V V
U
R
SET
U
I
RES
1
3
2
PATENT PENDING
U
GND
V
SET
+
V
BIAS
W
I
RES
V
+
–
RES
GAIN = 1
+
= (V
5.5V). This supply
+
– V
SET
) = 1.1V TYPICALLY
+
ƒ
MO
deter-
= 10MHz • 20k •
MASTER OSCILLATOR
+
Floating Pin 4 divides the master oscillator by 10. Pin 4
should be tied to V
frequency range. To detect a floating DIV pin, the LTC6900
attempts to pull the pin toward midsupply. Therefore,
driving the DIV pin high requires sourcing approximately
2 A. Likewise, driving DIV low requires sinking 2 A.
When Pin 4 is floated, it should preferably be bypassed by
a 1nF capacitor to ground or it should be surrounded by a
ground shield to prevent excessive coupling from other
PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5k
and/or 10pF loads. Heavier loads may cause inaccuracies
due to supply bounce at high frequencies. Voltage tran-
sients, coupled into Pin 5, above or below the LTC6900
power supplies will not cause latchup if the current into/
out of the OUT pin is limited to 50mA.
(V
+
I
– V
RES
SET
)
DIVIDER
SELECT
PROGRAMMABLE
( 1, 10 OR 100)
INPUT DETECT
THREE-STATE
DIVIDER (N)
+
for the 100 setting, the lowest
+
–
+
–
LTC6900
GND
V
+
OUT
2 A
2 A
DIV
6900 BD
5
4
5
6900f