CP1HXA40DRA Omron, CP1HXA40DRA Datasheet - Page 14

• Manufacturer Part Number: CP1HXA40DRA
• Description: 40 I/O,24DI,16DO REL,4AI,2AO
• Manufacturer: Omron

Specifications of CP1HXA40DRA

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

CPU Unit Specifications
Power Supply
Operating voltage range
Power consumption
Inrush current
External power supply
Insulation resistance
Dielectric strength
Noise immunity
Vibration resistance
Shock resistance
Ambient operating temperature
Ambient humidity
Ambient operating environment
Ambient storage temperature
Power holding time
Dimensions
Weight
Control method
I/O control method
Program language
Function blocks
Instruction length
Instructions
Instruction execution time
Common processing time
Program capacity
Number of tasks
Maximum subroutine number
Maximum jump number
I/O
areas
Work bits
TR Area
Holding Area
AR Area
Timers
Counters
DM Area (See note.)
Data Register Area
Index Register Area
Task Flag Area
Trace Memory
Memory Cassette
Clock function
Communications functions
Memory backup
Battery service life
Built-in input terminals
Number of connectable
Expansion (I/O) Units
Max. number of I/O points
Specifications
Input bits
Output bits
Built-in Analog Inputs
Built-in Analog Outputs
Serial PLC Link Area
Item
Item
100 to 240 VAC 50/60 Hz
85 to 264 VAC
Can be used for backing up programs or auto-booting.
100 to 120 VAC inputs: 20 A max. 8 ms max./200 to 240 VAC in-
puts: 40 A max. 8 ms max.
300 mA at 24 VDC
20 M min. (at 500 VDC) between the external AC terminals and
GR terminals
2,300 VAC at 50/60 Hz for 1 min between the external AC and
GR terminals, leakage current: 5 mA max.
Conforming to IEC 61000-4-4. 2 kV (power supply line)
10 to 57 Hz, 0.075-mm amplitude, 57 to 150 Hz, acceleration: 9.8 m/s2 in X, Y, and Z directions for 80 minutes each
(Sweep time: 8 minutes x 10 sweeps = total time 80 minutes)
147 m/s2, three times each in X, Y, and Z directions
0 to 55°C
10% to 90% (with no condensation)
No corrosive gas
-20 to 75°C (Excluding battery.)
10 ms min.
150 x 90 x 85 mm (W x H x D)
740 g max.
Stored program method
Cyclic scan with immediate refreshing
Ladder diagram
Maximum number of function block defi nitions: 128 Maximum number of instances: 256 Languages usable in function block
defi nitions: Ladder diagrams, structured text (ST)
1 to 7 steps per instruction
Approx. 400 (function codes: 3 digits)
Basic instructions: 0.10 ìs min. Special instructions: 0.15 ìs min.
0.7 ms
20 Ksteps
288 (32 cyclic tasks and 256 interrupt tasks) Scheduled interrupt tasks: 1 (interrupt task No. 2, fi xed) Input interrupt tasks: 8 (inter-
rupt task No. 140 to 147, fi xed), 6 for Y CPU Units High-speed counter interrupt tasks: 256 (interrupt task No. 0 to 255)
256
256
1,600 bits (100 words): CIO 0.00 to CIO 99.15
(The 24 built-in inputs are allocated in CIO 0.00 to CIO 0.11 and CIO 1.00 to CIO 1.11.)
1,600 bits (100 words): CIO 100.00 to CIO 199.15
(The 16 built-in outputs are allocated in CIO 100.00 to CIO 100.07 and CIO 101.00 to CIO 101.07.)
CIO 200 to CIO 203
CIO 210 to CIO 211
1,440 bits (90 words): CIO 3100.00 to CIO 3189.15 (CIO 3100 to CIO 3189)
8,192 bits (512 words): W000.00 to W511.15 (W0 to W511) 37,504 bits (2,344 words): CIO 3800.00 to CIO 6143.15
(CIO 3800 to CIO 6143)
16 bits: TR0 to TR15
8,192 bits (512 words): H0.00 to H511.15 (H0 to H511)
Read-only (Write-prohibited): 7168 bits (448 words): A0.00 to A447.15 (A0 to A447)
Read/Write: 8192 bits (512 words): A448.00 to A959.15 (A448 to A959)
4,096 bits: T0 to T4095
4,096 bits: C0 to C4095
32 Kwords: D0 to D32767
16 registers (16 bits): DR0 to DR15
6 registers (16 bits): IR0 to IR15
32 flags (32 bits): TK0000 to TK0031
4,000 words (500 samples for the trace data maximum of 31 bits and 6 words.)
A special Memory Cassette (CP1W-ME05M) can be mounted. Note: Can be used for program backups and auto-booting.
Supported. Accuracy (monthly deviation): -3.5 min to -0.5 min (ambient temperature: 55°C),
-1.5 min to +1.5 min (ambient temperature: 25°C), -3 min to +1 min (ambient temperature: 0°C)
One built-in peripheral port (USB1.1): For connecting Support Software only.
A maximum of two Serial Communications Option Boards can be mounted.
Flash memory: User programs, parameters (such as the PLC Setup), comment data, and the entire DM Area can be saved to fl ash
memory as initial values. Battery backup: The Holding Area, DM Area, and counter values (fl ags, PV) are backed up by a battery.
5 years at 25 °C. (Use the replacement battery within two years of manufacture.)
40 (24 inputs, 16 outputs)
CPM1A Expansion I/O Units: 7 max.; CJ-series Special I/O Units or CPU Bus Units: 2 max.
320 (40 built in + 40 per Expansion (I/O) Unit x 7 Units)
XA CPU Units: CP1H-XA@@@-@
AC power supply models: CP1H-@@@-A
X CPU Units: CP1H-X@@@-@
24 VDC
20.4 to 26.4 VDC
(21.6 to 26.4 VDC with four or more Expansion Units.)
50 W max.
30 A max. 20 ms max.
None
20 M min. (at 500 VDC) between the external DC terminals and
GR terminals
1,000 VAC at 50/60 Hz for 1 min between the external DC and
GR terminals, leakage current: 5 mA max.
2 ms min.
590 g max.
DC power supply models: CP1H-@@@-D
20 (12 inputs, 8 outputs)
Line-driver inputs: Two axes for phases A, B, and Z
Line-driver outputs: Two axes for CW and CCW
300
(20 built in + 40 per Expansion (I/O) Unit x 7 Units)
Y CPU Units: CP1H-Y@@@-@
129