LTC6803HG-2#TRPBF-ES Linear Technology, LTC6803HG-2#TRPBF-ES Datasheet
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LTC6803HG-2#TRPBF-ES
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LTC6803HG-2#TRPBF-ES Summary of contents
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... LTC6803-1 or LTC6803-3 devices to be daisy chained without opto- couplers or isolators. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. SERIAL ...
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LTC6803-2/LTC6803-4 ABSOLUTE MAXIMUM RATINGS + – Total Supply Voltage ( .................................75V – Input Voltage (Relative ............................................................ –0. C12 ........................................................ –0.3V to 75V Cn (Note 5) ......................... –0.3V to Min (8 • ...
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... Full-Scale Voltage Range Range of Inputs Cn < 0.25% Gain Error 11, LTC6803IG Range of Inputs C0, C1 < 0.25% Gain Error, LTC6803IG Range of Inputs Cn < 0.5% Gain Error 11, LTC6803HG Range of Inputs C0, C1 < 0.5% Gain Error, LTC6803HG Error in Measurement of 125°C SPECIFIED TEMPERATURE RANGE –40°C to 85°C – ...
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... Continuous Measuring (CDC = 2) Continuous Measuring (CDC = 2) Measure Every 130ms (CDC = 5) Measure Every 500ms (CDC = 6) Measure Every 2 Seconds (CDC = 7) + Current Into V Pin When In Standby, All Serial Port Pin at Logic “1” LTC6803IG LTC6803HG – + Current Out 43.2V, V Floating C12 (Note 8) V > 3V (Note 3) ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T SYMBOL PARAMETER Voltage Mode Digital I/O V Digital Input Voltage High IH V Digital Input Voltage Low IL V Digital Output Voltage Low OL I Digital Input Current IN Note 1: ...
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LTC6803-2/LTC6803-4 TYPICAL PERFORMANCE CHARACTERISTICS + Cell 12 Measurement Error vs V 100 T = 25° 3.3V CELL 10 1 0.1 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0 – V (V) C12 680324 G04 ...
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TYPICAL PERFORMANCE CHARACTERISTICS ADC Normal Mode Rejection vs Frequency 0 –10 –20 –30 –40 –50 –60 –70 10 100 1k 10k FREQUENCY (Hz) 680324 G13 Cell Input Bias Current During Standby and Hardware Shutdown 50 CELL INPUT = 3.6V 45 ...
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LTC6803-2/LTC6803-4 TYPICAL PERFORMANCE CHARACTERISTICS V Output Voltage REF vs Temperature 3.070 3.068 3.066 3.064 3.062 3.060 3.058 5 REPRESENTATIVE UNITS 3.056 –50 – 100 TEMPERATURE (°C) 680324 G21 V Load Regulation REG 5 ...
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PIN FUNCTIONS To ensure pin compatibility with LTC6802-2, the LTC6803-2 is configured such that the bottom cell input (C0) is con- nected internally to the negative supply voltage (V LTC6803-4 offers a unique pinout with an input for the bottom ...
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LTC6803-2/LTC6803-4 PIN FUNCTIONS WDTB (Pin 34): Watchdog Timer Output (Active Low). If there is no valid command received 2.5 seconds, the WDTB output is asserted. The WDTB pin is an open-drain NMOS output. When asserted it pulls ...
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BLOCK DIAGRAMS LTC6803-2 2nd REFERENCE C12 2 S12 3 C11 – DIE TEMP REF2 ∆Σ A/D MUX CONVERTER REFERENCE EXTERNAL TEMP ...
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LTC6803-2/LTC6803-4 BLOCK DIAGRAMS LTC6803-4 2nd REFERENCE C12 2 S12 3 C11 – DIE TEMP NC 28 TIMING DIAGRAM SCKI SDI CSBI SDO 12 V REF2 ...
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OPERATION THEORY OF OPERATION The LTC6803 is a data acquisition IC capable of mea- suring the voltage of 12 series connected battery cells. An input multiplexer connects the batteries to a 12-bit delta-sigma analog-to-digital converter (ADC). An internal 8ppm/°C voltage ...
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LTC6803-2/LTC6803-4 OPERATION LTC6803 CSBI C12 SDO + SDI S12 C11 SCKI + S11 A3 ADDRESS1 C10 A2 + S10 GPIO2 C8 GPIO1 + S8 WDTB C7 TOS + S7 V REG ...
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OPERATION There are two methods for indicating the UV/OV inter- rupt status: toggle polling (using a 1kHz output signal) and level polling (using a high or low output signal). The polling methods are described in the Serial Port section. The ...
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LTC6803-2/LTC6803-4 OPERATION ADC CONVERTER SELF TEST Two self-test commands can be used to verify the func- tionality of the digital portions of the ADC. The self tests also verify the cell voltage registers and temperature monitoring registers. During these self ...
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OPERATION Data Link Layer Clock Phase And Polarity: The LTC6803 SPI compat- ible interface is configured to operate in a system using CPHA = 1 and CPOL = 1. Consequently, data on SDI must be stable during the rising edge ...
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LTC6803-2/LTC6803-4 OPERATION An example to calculate the PEC is listed in Table 1 and Figure 4. The PEC of the 1 byte data 0x01 is computed as 0xC7 after the last bit of the byte streamed in. For multiple byte ...
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OPERATION LTC6803-2/LTC6803-4 680324f 19 ...
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LTC6803-2/LTC6803-4 OPERATION CSBI SCKI SDI SDO Figure 5. Transmission Format (ADC Conversion and Poll) CSBI SCKI SDI SDO Figure 6. Transmission Format (PLADC Conversion or PLINT) Toggle Polling: Toggle polling allows a robust determina- tion both of device states and ...
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OPERATION Revision Code The diagnostic register group contains a 2-bit revision code. If software detection of device revision is neces- sary, then contact the factory for details. Otherwise, the code can be ignored. In all cases, however, the values of ...
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LTC6803-2/LTC6803-4 OPERATION Commands Table 9. Command Codes and PEC Bytes COMMAND DESCRIPTION Write Configuration Register Group Read Configuration Register Group Read All Cell Voltage Group Read Cell Voltages 1-4 Read Cell Voltages 5-8 Read Cell Voltages 9-12 Read Flag Register ...
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OPERATION Table 9. Command Codes and PEC Bytes (continued) COMMAND DESCRIPTION Start Cell Voltage ADC Conversions and Poll Status, with Discharge Permitted Start Open-Wire ADC Conversions and Poll Status, with Discharge Permitted Table 10. Configuration (CFG) Register Group REGISTER RD/WR ...
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LTC6803-2/LTC6803-4 OPERATION Table 11. Cell Voltage (CV) Register Group REGISTER RD/WR BIT 7 CVR00 RD C1V[7] CVR01 RD C2V[3] CVR02 RD C2V[11] CVR03 RD C3V[7] CVR04 RD C4V[3] CVR05 RD C4V[11] CVR06 RD C5V[7] CVR07 RD C6V[3] CVR08 RD C6V[11] ...
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OPERATION Table 16. Memory Bit Descriptions NAME DESCRIPTION CDC Comparator Duty Cycle CELL10 10-Cell Mode LVLPL Level Polling Mode GPIO1 GPIO1 Pin Control GPIO2 GPIO2 Pin Control WDT Watchdog Timer DCCx Discharge Cell x V Undervoltage Comparison Voltage ...
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LTC6803-2/LTC6803-4 OPERATION SERIAL COMMAND EXAMPLES LTC6803-2/LTC6803-4 (Addressable Configuration) Examples below use a configuration of three stacked devices: bottom (B), middle (M), and top (T) Write Configuration Registers (Figure 7) (Broadcast Write) 1. Pull CSBI low 2. Send WRCFG command and ...
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OPERATION Start Cell Voltage ADC Conversions and Poll Status (Broadcast Command with Toggle Polling) 1. Pull CSBI low 2. Send STCVAD command and its PEC byte (all devices in stack start ADC conversions simultaneously) 3. SDO output of all devices ...
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LTC6803-2/LTC6803-4 APPLICATIONS INFORMATION DIFFERENCE BETWEEN THE LTC6803-2 AND LTC6803-4 The only difference between the LTC6803-2 and the LTC6803-4 is the bonding of the V – V and C0 are separate signals on every LTC6803 die. In the LTC6803-2 package, the ...
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APPLICATIONS INFORMATION + MUX + – Figure 9. Open Connection + MUX ...
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LTC6803-2/LTC6803-4 APPLICATIONS INFORMATION USING THE S PINS AS DIGITAL OUTPUTS OR GATE DRIVERS The S outputs include an internal pull-up PMOS. Therefore the S pins will behave as a digital output when loaded with a high impedance, e.g. the gate ...
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APPLICATIONS INFORMATION NEXT HIGHER GROUP OF 7 CELLS 100 + V C12 S12 C11 S11 C10 S10 LTC6803 ...
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LTC6803-2/LTC6803-4 APPLICATIONS INFORMATION + V 1 C12 2 S12 3 C11 4 S11 5 C10 Z 6 CLAMP S10 CLAMP ...
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APPLICATIONS INFORMATION – 74HC4052 + 1/2 LT6004 INH GND CPO2 GPO1 V REG V ...
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LTC6803-2/LTC6803-4 APPLICATIONS INFORMATION 499k + CELLGROUP 1M WDTB V REG 1/2 LT6004 V TEMP1 2 – 4 – V – CELLGROUP Figure 19. Using a V Input for Full-Stack Readings TEMP the resistive loading on the ...
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APPLICATIONS INFORMATION SUPPLY DECOUPLING IF BATTERY-STACK POWERED As shown in Figure 21, the LTC6803-4 can have filtering + – on both V and differential bypassing to the cell group potentials is recommended. The Zener suppresses overvoltages from ...
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LTC6803-2/LTC6803-4 APPLICATIONS INFORMATION HARDWARE SHUTDOWN To completely shut down the LTC6803 a PMOS switch can + + be connected or, V can be driven from an isolated power supply. Figure 23 shows an example of a switched ...
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APPLICATIONS INFORMATION As an example, Figure 24 shows the DC voltage on each – pin with respect to V when twelve 3.6V battery cells are connected to the LTC6803. ADVANTAGES OF DELTA-SIGMA ADCS The LTC6803 employs a delta-sigma analog-to-digital converter ...
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LTC6803-2/LTC6803-4 APPLICATIONS INFORMATION For a given sample rate, a delta-sigma converter can achieve excellent noise rejection while settling completely in a single conversion—something that a filtered SAR con- verter cannot do. Noise rejection is particularly important in high voltage switching ...
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... ONE ANOTHER WITHIN 0.08mm AT SEATING PLANE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... CSBI SPI PORT SDO* TO HOST µP SDI OR DATA ISOLATOR SCKI RESISTOR AT HOST DEVICE 10.0k 3 1µ 10nF 1/2 LT6004 2 – 10.0k 7 1/2 LT6004 6 – 10nF 680324 TA02 LT 0211 • PRINTED IN USA LINEAR TECHNOLOGY CORPORA TION 2011 NTC2 NTC1 680324f ...