LT3501EFE Linear Technology, LT3501EFE Datasheet - Page 7

• Manufacturer Part Number: LT3501EFE
• Description: IC,SMPS CONTROLLER,CURRENT-MODE,BIPOLAR,TSSOP,20PIN,PLASTIC
• Manufacturer: Linear Technology

TYPICAL PERFORMANCE CHARACTERISTICS
PIN FUNCTIONS
V
circuitry for both channels and is monitored by the
undervoltage lockout comparator. The V
connected to the collector of channel 1’s on-chip power
NPN switch. The V
be decoupled to ground close to the pin of the device.
SW1/SW2 (Pins 2, 9): The SW pin is the emitter of the on-
chip power NPN. At switch off, the inductor will drive this
pin below ground with a high dV/dt. An external Schottky
catch diode to ground, close to the SW pin and respective
V
this pin from excessive negative voltages.
IND1/IND2 (Pins 3, 8): The IND pin is the input to the
on-chip sense resistor that measures current fl owing in
the inductor. When the current in the resistor exceeds
the current dictated by the V
reset, disabling the output switch. Bias current fl ows out
of the IND pin when IND is less than 1.6V.
V
the on-chip sense resistor that measures current fl owing
in the inductor. When the current in the resistor exceeds
the current dictated by the V
reset, disabling the output switch. Bias current fl ows out
of the V
IN1
IN
OUT1
3
decoupling capacitor’s ground, must be used to prevent
6
5
4
2
1
0
2
Dropout Operation
(Pin 1): The V
LOAD = 1A
/V
OUT
2.5
OUT2
pin when V
3
(Pins 4, 7): The V
INPUT VOLTAGE (V)
3.5
V
OUT
IN1
= 5V
4
IN1
pin has high dI/dt edges and must
V
4.5
OUT
OUT
pin powers the internal control
= 3.3V
FREQUENCY
5
is less than 1.6V.
C
C
1.5MHz
250kHz
pin, the SW latch is held in
pin, the SW latch is held in
5.5
3501 G27
OUT
6
pin is the output to
IN1
1250
1500
1000
750
250
500
pin is also
7
Inductor Value vs Frequency for
3A Maximum Load Current
V
I
RIPPLE
OUT
9
= 3.3V
= 1A
11
INPUT VOLTAGE (V)
13
L = 2.2µH
L = 3.3µH
15
L = 4.7µH
PG1/PG2 (Pins 5, 6): The power good pin is an open-col-
lector output that sinks current when the feedback falls
below 90% of its nominal regulating voltage. For V
above 1V, its output state remains true, although during
shutdown, V
its current sink capability is reduced. The PG pins can be
left open circuit or tied together to form a single power
good signal.
V
on-chip power NPN switch. This pin is independent of V
and may be connected to the same or a separate supply. In
either case, high dI/dt edges are present and decoupling
to ground must be used close to this pin.
SS1/SS2 (Pins 19, 12): The SS1/2 pins control the soft-
start and sequence of their respective outputs. A single
capacitor from the SS pin to ground determines the outpt
ramp rate. For soft-start and output tracking/sequencing
details, see the Applications Information section.
V
error amplifi er and the input to the peak switch current
comparator. It is normally used for frequency compensa-
tion, but can also be used as a current clamp or control
loop override. If the error amplifi er drives V
maximum switch current level, a voltage clamp activates.
17
IN2
C1
L = 6.8µH
/V
19
(Pin 10): The V
C2
21
(Pins 18, 13): The V
23
3501 G28
IN1
25
undervoltage lockout or thermal shutdown,
IN2
1500
1250
1000
500
250
750
pin is the collector of channel 2’s
10
Inductor Value vs Frequency for
3A Maximum Load Current
12.5
L = 2.2µH
C
pin is the output of the
INPUT VOLTAGE (V)
15
17.5
L = 3.3µH
LT3501
L = 4.7µH
20
C
above the
V
I
L = 6.8µH
L = 10µH
RIPPLE
OUT
22.5
= 5V
= 1A
3501 G29
3501fb
7
IN1
IN1
25