AGR09130EF TriQuint, AGR09130EF Datasheet
AGR09130EF
Manufacturer Part Number
AGR09130EF
Description
RF MOSFET Power RF Transistor
Manufacturer
TriQuint
Specifications of AGR09130EF
Minimum Operating Temperature
- 65 C
Product Type
RF MOSFET Power
Transistor Polarity
N-Channel
Configuration
Single
Drain-source Breakdown Voltage
65 V
Gate-source Breakdown Voltage
- 0.5 V, + 15 V
Power Dissipation
350 W
Maximum Operating Temperature
+ 200 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AGR09130EF
Manufacturer:
ASI
Quantity:
20 000
AGR09130E
130 W, 921 MHz—960 MHz, N-Channel E-Mode, Lateral MOSFET
access (CDMA), global system for mobile communi-
cation (GSM), enhanced data for global evolution
(EDGE), and time division multiple access (TDMA)
single and multicarrier class AB wireless base station
amplifier applications. This device is manufactured
on an advanced LDMOS technology offering state-
of-the-art performance, and reliability. Packaged in
an industry-standard package incorporating internal
matching and capable of delivering a minimum out-
put power of 130 W, it is ideally suited for today's RF
power amplifier applications.
Introduction
The
metal oxide semiconductor (LDMOS) RF power tran-
sistor suitable for cellular band, code division multiple
Features
Typical performance ratings are for the EDGE
format: 3GPP GSM 05.05:
— Output power (P
— Power gain: 17.8 dB.
— Modulation spectrum:
— Error vector magnitude (EVM) = 1.8%.
— Return loss: –10 dB.
High-reliability, gold-metalization process.
Internally matched.
High gain, efficiency, and linearity.
Integrated ESD protection.
Si LDMOS.
Industry-standard packages.
P
1dB
AGR09130E
@ ±400 kHz = –60 dBc.
@ ±600 kHz = –72 dBc.
of 130 W minimum output power.
AGR09130EU
7
Figure 1. Available Packages
is a high-voltage, laterally diffused
OUT
): 50 W.
48
AGR09130EF
5
Table 1. Thermal Characteristics
Table 2. Absolute Maximum Ratings*
* Stresses in excess of the absolute maximum ratings can cause
Table 3. ESD Rating*
* Although electrostatic discharge (ESD) protection circuitry has
Caution: MOS devices are susceptible to damage from elec-
Drain-source Voltage
Gate-source Voltage
Drain Current—Continuous
Total Dissipation at T
Operating Junction Tempera-
Storage Temperature Range
Thermal Resistance,
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Derate Above 25 C:
ture
Junction to Case:
AGR09130E
AGR09130EU
AGR09130EF
AGR09130EU
AGR09130EF
AGR09130EU
AGR09130EF
HBM
CDM
Parameter
MM
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
Parameter
C
Minimum (V)
= 25 °C:
1500
500
50
Sym
R
JC
V
T
Sym
V
P
DSS
T
STG
I
GS
D
D
J
Value
0.5
0.5
–65, 150
–0.5, 15 Vdc
Value
350
350
200
2.0
2.0
65
15
PEAK Devices
Class
1B
A
4
°C/W
Unit
W/°C
Unit
Vdc
Adc
°C
°C
W
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