ADNS-5060 Avago Technologies US Inc., ADNS-5060 Datasheet - Page 22

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ADNS-5060

Manufacturer Part Number
ADNS-5060
Description
IC USB OPT MOUSE SENSOR HS 8-DIP
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ADNS-5060

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADNS-5060
Manufacturer:
MICRON
Quantity:
60
SCLK
If the microprocessor waits at least t
it will ensure that the ADNS-5060 has powered up and
the timer has timed out. This assumes that the micro-
processor and the ADNS-5060 share the same power
supply. If not, then the microprocessor must wait for t
from ADNS-5060 V
for the address, the ADNS-5060 will be in-sync with the
microprocessor.
Resync Note
If the microprocessor and the ADNS-5060 get out of sync,
then the data either written or read from the registers will
be incorrect. An easy way to solve this is to use watchdog
timer timeout sequence to resync the parts after an
incorrect read.
Power-up
ADNS-5060 has an on-chip internal power-up reset (POR)
circuit, which will reset the chip when VDD reaches the
valid value for the chip to function.
Figure 27. ADNS-5060 soft reset sequence timing
Soft reset will occur when writing 0x80 to the configura-
tion register.
SDIO
Figure 28. Soft reset configuration register writing operation
22
SCLK
CLK
SDIO
Operation
Write
1
DD
1
valid. Then when the SCLK toggles
0
Con- g uration Register Address
0
1
0
A
6
0
SPTT
A
5
0
from V
A
4
A
3
DD
0
valid,
SPTT
1
D
5
0
Soft Reset
ADNS-5060 may also be given the reset command at any
time via the serial I/O port. The timing and transactions
are the same as those just specified for the power-up
mode in the previous section.
The proper way to perform soft reset on ADNS-5060 is:
1. The microcontroller starts the transaction by sending
2. The digital section is now ready to go. It takes 3 frames
D
4
Con- g uration Register Data (0x80)
0
a write operation containing the address of the
configuration register and the data value of 0x80. Since
the reset bit is set, ADNS-5060 will reset and any other
bits written into the configuration register at this time
is properly written into the Configuration Register.
After the chip has been reset, very quickly, ADNS-
5060 will clear the reset bit so there is no need for the
microcontroller to re-write the Configuration Register
to reset it.
for the analog section to settle.
D
3
0
D
2
D
1
0
D
0
0
Reset Occurs
here
0
0

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