CYIL1SM0300AA-QWC Cypress Semiconductor Corp, CYIL1SM0300AA-QWC Datasheet - Page 20

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CYIL1SM0300AA-QWC

Manufacturer Part Number
CYIL1SM0300AA-QWC
Description
IMAGE SENSOR CMOS LUPA-300
Manufacturer
Cypress Semiconductor Corp
Type
CMOS Imagingr
Datasheet

Specifications of CYIL1SM0300AA-QWC

Pixel Size
9.9µm x 9.9µm
Active Pixel Array
640H x 480V
Frames Per Second
250
Voltage - Supply
2.5 V ~ 3.3 V
Package / Case
48-LCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
In case non destructive readout is used, the pulses on the input
pins still need to be given. By setting the NDR bit to "1" the
internal pixel reset pulses are suppressed but the external pulses
are still needed to have the correct timing of the frame transfer.
Readout Timing
The sensor is readout row by row. The LINE_VALID signal shows
when valid data of a row is at the outputs. FRAME_VALID shows
Document Number: 001-00371 Rev. *F
PIXEL SAMPLE
INT_TIME_3
INT_TIME_1
INT_TIME_2
DS RESET
TS RESET
RESET_N
(internal )
(internal )
(internal )
(internal )
RESET
LINE_VALID
FOT
SPI
DATA
<9:0>
CLK
Invalid
12.5ns
upload
SPI
Valid
Figure 19. Integration Timing in Slave Mode
Valid
periods
8 clk
Figure 20. LINE_VALID Timing.
Valid
periods
8 clk
Valid
which
FRAME_VALID is low, must be discarded.
Figure 21
Note The FRAME_VALID signal automically goes low after 480
LINE_VALID pulses in mastermode.
periods
8 clk
Total Integration Time
LINE_VALIDs
Invalid
illustrate this.
DS Integration Time
Simultanious
TS Integration
Invalid
Time
FOT
are
Valid
valid.
min 12 clk
min 12 clk
periods
periods
CYIL1SM0300AA
LINE_VALIDs
Valid
Figure 20
Page 20 of 31
when
and
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