CYII5SC1300AA-QDC Cypress Semiconductor Corp, CYII5SC1300AA-QDC Datasheet

no-image

CYII5SC1300AA-QDC

Manufacturer Part Number
CYII5SC1300AA-QDC
Description
IC SENSOR IMMAGE COLOR 84-LCC
Manufacturer
Cypress Semiconductor Corp
Type
CMOS Imagingr

Specifications of CYII5SC1300AA-QDC

Pixel Size
6.7µm x 6.7µm
Active Pixel Array
1280H x 1024V
Frames Per Second
27
Voltage - Supply
3 V ~ 4.5 V
Package / Case
84-LCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
IBIS5-A-1300
Datasheet
IBIS5-A-1300
1.3M Pixel
Dual Shutter Mode
CMOS Image Sensor
Datasheet
Cypress Semiconductor Corporation
3901 North First Street
San Jose, CA 95134
408-943-2600
Contact
info@Fillfactory.com
Document #: 38-05710 Rev.**(Revision 1.3)
Page 1 of 67

Related parts for CYII5SC1300AA-QDC

CYII5SC1300AA-QDC Summary of contents

Page 1

... IBIS5-A-1300 Datasheet IBIS5-A-1300 1.3M Pixel Dual Shutter Mode CMOS Image Sensor Datasheet Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) 3901 North First Street San Jose, CA 95134 408-943-2600 Page ...

Page 2

... Setting of the ADC reference voltages ........................................................... 28 3.8.3 Non-linear and linear conversion mode – “gamma” correction .................. 29 3.8.4 Pins involved in the ADC circuitry ................................................................ 30 3.9 E LECTRONIC SHUTTER TYPES 3.9.1 Rolling (curtain) shutter................................................................................. 31 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ......................................................................................... 6 ......................................................................... 6 .............................................................. 8 .................................................................................. 9 ....................................................................................... 15 .......................................................................... 27 ...

Page 3

... STORAGE AND HANDLING................................................................................. 62 7.1 S ........................................................................................... 62 TORAGE CONDITIONS 7.2 H ANDLING AND SOLDER PRECAUTIONS 8 ORDERING INFORMATION ................................................................................ 64 APPENDIX A: IBIS5 EVALUATION SYSTEM ...................................................... 65 APPENDIX B: FREQUENTLY ASKED QUESTIONS ........................................... 66 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ......................................................................................... 43 : ......................................... 44 SINGLE SLOPE INTEGRATION : ............................................................ 45 PIXEL READOUT : MULTIPLE SLOPE INTEGRATION ...

Page 4

... In addition to the 10-bit pixel data stream, the sensor outputs the valid frame, line and pixel sync signals needed for encoding. This datasheet allows the user to develop a camera system based on the described timing and interfacing. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 5

... CYII5SC1300AA-HAC 84 pins JLCC package (Preliminary) IBIS5-A-1300-C-2 84 pins LCC package CYII5SC1300AA-QAC (Preliminary) * JLCC package for use in evaluation kits only. ** D263 is used as monochrome glass lid (see Figure 36 for spectral transmittance). *** S8612 is used as color glass lid (see Figure 37 for spectral transmittance). Other packaging combinations are available upon special request. ...

Page 6

... Peak 0.16 A/W 7.22 mV/s Dark current (@ RT 410 e-/s Noise electrons < S/N ratio 1600:1 (64 dB) Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Table 1: Pixel characteristics Remarks Allows for both rolling and synchronous (snapshot) shutter. µ The resolution and pixel size results 2/3” ...

Page 7

... It includes effects of non-sensitive areas in the pixel, e.g. interconnection lines. The sensor is light sensitive between 400 and 1000 nm. The peak approximately 30% between 500 and 700 nm. In view of a fill factor of 50%, the QE is thus larger than 60% between 500 and 700 nm. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Remarks I ...

Page 8

... Windowing (ROI) uploaded position. Sub-sampling modes: 1:2 sub-sampling. • X-direction Sub-sampling patterns: • Y-direction Identical sub-sample patterns as X-direction. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) a. XXOOXXOO (for Bayer pattern color filter) b. OOXXOOXX (for Bayer pattern color filter) c. XOXOXOXO d. OXOXOXOX ...

Page 9

... Highest reset voltage. VDDC Pixel core voltage. Analog supply voltage of the VDDA image core. Digital supply voltage of the image VDDD core. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Normal (1) or double (2) slope. Range from 3 4.5 V Nominal 3.3 V Nominal 3.3 V Value -0 ...

Page 10

... Input high voltage IH V Input low voltage IL I Input leakage current IN V Output high voltage OH V Output low voltage OL Maximum operating I DD current Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Min Typ -0.5 0 -0 Condition Min 2.1 V ...

Page 11

... Most of the signals for the image core are generated by the on-chip sequencer. Some basic signals (like start/stop integration, line and frame sync signals, etc…) have to be generated externally. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 12

... The IBIS5-A-1300 can also be processed with a Bayer RGB color pattern. Pixel (0,0) has a green filter and is situated on a green-blue row. Figure 5: Color filter arrangement on the pixels. Green1 and green2 have a slight different spectral Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 13

... The frame period of the IBIS5-A-1300 sensor depends on the shutter type and can be calculated as follows: 3.3.1 Rolling shutter => Frame period = (Nr. Lines * (RBT + pixel period * Nr. Pixels)) Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) 3901 North First Street ...

Page 14

... ROI dimensions. Table 7: Frame rate vs. resolution Image Resolution (X*Y) 1280 x 1024 640 x 480 100 x 100 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) (initiates the X-shift register) pulse. The CLK Frame rate Frame readout ...

Page 15

... Fixed Pattern Noise of the pixels and of the column amplifiers themselves by means of a Double Sampling technique. After the row blanking time the pixels are fed to the output amplifier. The pixel rate is equal to the Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev ...

Page 16

... Table 8. Table 8: Snapshot shutter recommended supply settings Symbol VDDH VDDR_LEFT VDDC VDDA VDDD GNDA GNDD GND_AB Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) DDR_LEFT NEEPOINT_LSB/MSB By setting the V DDR_RIGHT_EXT pin can be disconnected from the circuit DDR_RIGHT Parameter Voltage on HOLD switches ...

Page 17

... Connect to VDDA with R = 50kΩ and ADC_CMD decouple to GNDA with C = 100 nF. Connect to VDDA with R = 90Ω and ADC_VHIGH decouple to GNDA with C = 100 nF. ADC_VLOW Connect to GNDA with R = 360Ω and Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Typ +4.5 +4.5 +3.0 +3 ...

Page 18

... Pins involved in the image core circuitry Table 11 gives an overview of the IBIS5-A-1300 pins used by the image core with a short functional description. Power and ground lines are shared between the output amplifier and the image sensor. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 19

... EOS_X (output) Reference voltages DEC_CMD 13 COL_CMD 31 32 PC_CMD Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Function Supply of the pixel core. Analog supply of the image core. Analog ground of the image core. Digital ground of the image core. Digital supply of the image core. ...

Page 20

... When sub-sampling is enabled, X register moves 2 bits at the time. Taking into account that every register selects 2 columns, hence 2 pixels, sub-sampling results in the pattern “XXOOXXOO” when 8 pixels are considered. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 21

... Because every register addresses 2 columns at the time, the addressable pixels range in sub-sample mode is from 0 to half the maximum number of pixels in a row (only even values!). For instance 8… 638. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Table 12: X-sub sample patterns ...

Page 22

... Activating Y_SWAP12 results in pattern "XOXOXOXO". Activating Y_SWAP30 results in pattern "OXOXOXOX". Activating both Y_SWAP12 and Y_SWAP30 results in pattern "OOXXOOXX". The addressable pixels range when Y-sub sampling is enabled is: 0-1, 4-5, 8-9, 12-13, … 1020-1021. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Y_SWAP12 ...

Page 23

... There are 2 different offsets that can be adjusted using the on-chip DAC (7 bit): D and AC_FINE AC_RAW even columns used to add a general (both even and odd columns) to the AC_RAW Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) & D AC_VHIGH AC_VLOW A + GAIN [0… ...

Page 24

... AC_FINE These registers are inputs for 2 DACs (see Figure 10) that operate on the same resistor that is connected between pins D defined using a resistive division with R Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Table 14: Overview gain settings ...

Page 25

... Pins involved in the output amplifier circuitry Table 15 gives an overview of the IBIS5-A-1300 pins used by the output amplifier with a short functional description. Power and ground lines are shared between the output amplifier and the image sensor. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 26

... High reference voltage of the DAC. 27 Low reference voltage of the DAC. DAC_VLOW Output amplifier speed/power bias voltage. Can be used to enhance 30 AMP_CMD the speed of the output stage. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) 3901 North First Street San Jose, CA 95134 408-943-2600 Page ...

Page 27

... Figure 12. Due to these delays it is advised that a variable phase difference is foreseen between the A _ and the CLOCK YS CLOCK Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Table 16: ADC specifications 1 – 3V (*) 10 Bits 40 Msamples/s Typ. < 0.5 LSB Typ. < 3 LSB < ...

Page 28

... Note that the recommended ADC resistors value yields in a conversion of the full analog output swing at unity gain (V ADC_VLOW). The values of the resistors depend on the value and A DC_VLOW DC_VHIGH ADC. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) R ADC_VHIGH external internal R ...

Page 29

... It increases contrast in dark areas and reduces contrast in bright areas. The non-linear transfer function is given by: Vin = DC_VHIGH DC_VHIGH With: a=5 b=0.027 x=digital output code Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) 2 a*x + b*x – DC_VLOW ...

Page 30

... ADC_VDDD 54, 72 ADC_GNDA ADC_GNDD 56, 73 ADC_VDDA 55, 74 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Description Input, connect to sensor’s output (PXL_OUT1; pin 28) ADC clock; ADC converts on rising edge. Output bits; <0> = LSB, <9> = MSB ADC high reference voltage ADC low reference voltage ADC speed/power bias voltage ...

Page 31

... Both pointers are shifted by the same Y-clock and move over the focal plane. The integration time is set by the delay between both pointers. y Line number Figure 15: Rolling shutter operation Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) x Reset line ...

Page 32

... The pixel core is read out line by line after integration. Note that the integration and read out cycle is carry out in serial, which causes that no integration is possible during read out. During synchronous shutter the input pins S Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) _ register (in number of lines) ...

Page 33

... GRAN_SS_SEQ_LSB 6 GRAN_SS_SEQ_MSB 7 KNEEPOINT_LSB 8 KNEEPOINT_MSB 9 KNEEPOINT_ENABLE 10 VDDR_RIGHT_EXT 11 1 (0001) 11:0 NROF_PIXELS Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) to control the integration period in snapshot shutter mode. Table 18: Internal registers Description Default value <11:0>:”000011000100” rolling shutter 0 = synchronous shutter 0 = fast ...

Page 34

... BIT_INV 12 (1100) Reserved. 13 (1101) Reserved. 14 (1110) Reserved. 15 (1111) Reserved. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Description Default value <11:0>:”001001111111” Number of lines to count. Default value <11:0>:”001111111111” Integration time. Default value <11:0>:”111111111111” X start position (maximum 1280/2). ...

Page 35

... G RAN_SS_SEQ_MSB This way the integration time in synchronous shutter mode can be a multiple of 32, 64, 128 or 256 times the system clock period. To overcome global reset issues it is advised Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) define the calibration mode of the output ...

Page 36

... Table 21: Multiple slope register settings KNEE_POINT MSB/LSB ENABLE ( The actual knee-point depends on V Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) SS-sequencer clock Integration time step SYS_CLOCK 64 x SYS_CLOCK 128 x SYS_CLOCK 256 x SYS_CLOCK ) can result in more signal swing for the ...

Page 37

... Y-shift register (read out Y-shift register). This loads the left Y-shift register with the pointer loaded in Y Y_CLOCK pulse, the pointer shifts to the next row and the integration time counter increases until it reaches the value loaded in the I Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 38

... If the internal ADC is used bits 0 and 1 can be used to create test pattern to test the sample moment of the ADC. If the ADC sample moment is not chosen correctly the created test pattern will not be black-white-black-etc. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev ...

Page 39

... RISTATE normal operation mode. 3.10.2.10.2 G (bit 1) AMMA set to 1, the ADC input to output conversion is linear; otherwise the AMMA Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) is bypassed and the gain amplifier is put in AIN which should be connected to XL_OUT1 register gives the highest offset voltage, bit setting ...

Page 40

... See section 3.8.3 for more details. 3.10.2.10.3 B (bit 2) IT_INV 0000000000 is the conversion of the lowest possible input voltage, IT_INV otherwise the bits are inverted. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) 3901 North First Street San Jose, CA 95134 408-943-2600 Page ...

Page 41

... The serial-3-wire interface (or Serial-to-Parallel Interface) uses a serial input to shift the data in the register buffer. When the complete data word is shifted into the register buffer the data word is loaded into the internal register where it is decoded. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 42

... SI2_ADDR<0>…<4> 46-50 P_WR 2 S_CLK 3 4 S_DATA S_EN 5 SER_MODE 6 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) EG_ADDR (3:0) R EG_DATA (11:0) is 2.5 MHz. _DATA Function Data parallel interface. <0> : LSB Data parallel interface. <15> : MSB Date parallel interface. ...

Page 43

... Figure 20: Relative timing of the 5 sequencer control signals Figure 22 shows a recommended schematic for generating the basic signals and to avoid any timing problems. SYS_CLOCK_N Figure 21: Recommended schematic for generating basic signals Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) SS_START SS_STOP ...

Page 44

... The SS-sequencer puts the image core in a readable state. It takes 2 granulated SS- 5 sequencer clock periods. T The “real” integration or exposure time. int Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) are asserted, the sequencer stays in a suspended state. 3901 North First Street ...

Page 45

... ROF_LINES Y- ). CLOCK On Y the left Y-shift-register of the image core is loaded with the YL-pointer that _START Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) is applied, the sequencer stays in a _CLOCK T (µs) ...

Page 46

... cycles. YS_CLOCK 2 T Time for new X-pointer position upload details). Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Figure 24: Pixel output output becomes valid after 5 S output or external X IXEL_VALID register (see 4.6 for more _REG 3901 North First Street ...

Page 47

... SS-sequencer resulting in a bad pixel reset. T SS-sequencer clock (see Table 26). Table 26: T Granularity GRAN 128 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) pulse is applied. S_START should be set back to “0” before the SS_STOP pulse pulse is applied, the integration time counter is reset. KNEEPOINT MSB/LSB ...

Page 48

... Y-shift-register is generated, hence defining the integration time. See also chapter’s 3.10.2 and 3.10.2.4 for a detailed description of the rolling shutter operation. T Integration time [ # lines] = register(N int Note: For normal operation the values of the Y Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) T (µs) ...

Page 49

... The actual time to load the register is self depends on the interface mode that is used. The parallel interface is the fastest. Table 28: T Interface mode Parallel interface Serial 3 Wire Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) signal, loading a new X-pointer (stored _SYNC ...

Page 50

... All internal register will be set to 0 after SYS_RESET is applied. As all the IBIS5-A-1300 control signal are active high it is also recommended to apply a low level (before SYS_RESET occurs) to these pins at start up to avoid latch up. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 51

... SYS_RESET Input 24 EL_BLACK Input 25 EOSX Output Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Table 29: Pin list Pin description Digital input. Data parallel interface. Digital input (active high). Parallel write. Digital input. Clock signal of serial interface. Digital input/output. Data of serial interface. ...

Page 52

... ADC_VDDA Supply 56 Ground ADC_GNDD 57 ADC_VDDD Supply Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Pin description Analog reference input. Biasing of DAC for output dark level. Can be used to set output range of DAC. Default: Connect to VDDA with Ω. Analog reference input. Biasing of DAC for output dark level ...

Page 53

... P_DATA<9> REMARKS: 1. All pins with the same name can be connected together. 2. All digital input are active high (unless mentioned otherwise). 3. Digital inputs that are not used should be tied to GND. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Pin description Digital input ...

Page 54

... Pad 1 Pixel array center Origin (0,0) Pixel 0,0 Pad 11 Pad 12 740,2 µm Figure 29: IBIS5-A-1300 bare die dimensions Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Identification 8576.0 µm (1280 * 6.7) 6860.8 µm (1024 * 6.7) 5039.5 µm Pad 32 10048.6 µ ...

Page 55

... IBIS5-A-1300 in 84-pins LCC package 6.2.1 Technical drawing of the 84-pins LCC package Figure 30: Top view of the 84-pins LCC package (all dimensions in mm). Figure 31: Side view of the 84-pins LCC package (all dimensions in mm). Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 56

... G Imager to lid-outer surface H Imager to lid-inner surface J Imager to seating plane of package Figure 32: Side view dimensions. Pin 1 Figure 33: Bottom view of the 84-pins LCC package (all dimensions in mm). Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) (inch) Min Typ Max 0.020 0.022 ...

Page 57

... IBIS5-A-1300 Datasheet 6.2.2 Bonding of the IBIS5-A-1300 sensor in the 84-pins LCC package Figure 34: Bonding of the IBIS5-A-1300 in the 84-pins LCC package. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Pixel 640,512 3901 North First Street San Jose, CA 95134 408-943-2600 Page ...

Page 58

... Die placement of the IBIS5-A-1300 in the 84-pins LCC package 7,42 15,24 9,24 7,82 Figure 35: Die placement of the IBIS5-A-1300 in the 84-pins LCC package (all dimensions in mm). Tolerance on the die placement in X- and Y-directions is maximal +/- 50 um. Cypress Semiconductor Corporation Contact info@Fillfactory.com 15,24 7,62 10,049 Pixel 640,512 ...

Page 59

... D263 glass. 100 400 500 Figure 36: Transmission characteristics of the D263 glass used as protective cover for the IBIS5-A-1300 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) 600 700 Wavelength [nm] sensors. 3901 North First Street San Jose, CA 95134 800 900 408-943-2600 Page ...

Page 60

... A S8612 glass lid (which has a refraction index of 1.55) will be used as NIR cut-off filter on top of the IBIS5-A-1300-C color image sensor. Figure 37 shows the transmission characteristics of the S8612 glass. Figure 37: Transmission characteristics of the S8612 glass used as protective cover for the IBIS5-A-1300 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 61

... IBIS5-A-1300 Datasheet Figure 38: Color response of the IBIS5-A-1300-C in combination with the S8612 NIR filter Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) 3901 North First Street San Jose, CA 95134 408-943-2600 Page ...

Page 62

... The soldering period for each pin should be less than 5 seconds. Reflow Soldering: Figure 39 shows the maximum recommended thermal profile for a reflow soldering system. If the temperature/time profile exceeds these recommendations damage to the image sensor may occur. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Table 31: Storage conditions. ...

Page 63

... It is recommended that isopropyl alcohol (IPA) is used as a solvent for cleaning the image sensor glass lid. When using other solvents, it should be confirmed beforehand whether the solvent will dissolve the package and/or the glass lid or not. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) ...

Page 64

... Added Cypress Document # 38-05710 Rev ** in the document footer. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Cypress Semiconductor Part Number CYII5SM1300AA-HBC (Preliminary) CYII5SM1300AA-QBC (Preliminary) CYII5SC1300AA-HAC (Preliminary) CYII5SC1300AA-QAC (Preliminary) for more information. 3901 North First Street San Jose, CA 95134 408-943-2600 Page ...

Page 65

... Default register values can be loaded to start the software in a desired state. Figure 40: Content of the IBIS5 evaluation kit Please contact FillFactory (info@Fillfactory.com) for more information on the evaluation kit. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) 3901 North First Street ...

Page 66

... Please look at our website to find some pictures taken with the IBIS4-1300 in double slope mode on: http://www.fillfactory.be/htm/technology/htm/dual-slope.htm. Please contact support@fillfactory.com multiple slope extended dynamic range mode with the IBIS5-A-1300 sensor. Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) for additional application notes to use the ...

Page 67

... Document History Page Document Title: IBIS5A-1300 1.3M Pixel DualShutter Mode CMOS Image Sensor Document Number: 38-05710 Rev. ECN No. ** 310213 Cypress Semiconductor Corporation Contact info@Fillfactory.com Document #: 38-05710 Rev.**(Revision 1.3) Issue Date Orig. of Change See ECN SIL (EOD) 3901 North First Street ...

Related keywords