MCP3901A0-E/SS Microchip Technology, MCP3901A0-E/SS Datasheet - Page 36

• Manufacturer Part Number: MCP3901A0-E/SS
• Description: IC ENERGY METER AFE 2CH 20-SSOP
• Manufacturer: Microchip Technology

Specifications of MCP3901A0-E/SS

• Number Of Bits: 24
• Number Of Channels: 2
• Power (watts): 10mW
• Voltage - Supply, Analog: 4.5 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Ic Function: Analog Front End Device IC
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SSOP
• No. Of Pins: 20
• No. Of Channels: 2
• Input Voltage: 2.2 V to 2.6 V
• Mounting Style: SMD/SMT
• Supply Voltage Max: 5.5V
• Rohs Compliant: Yes
• Interface Type: SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP3901
6.7.1
Both ADCs are powered up with their default
configurations, and begin to output DR pulses
immediately (RESET<1:0> and SHUTDOWN<1:0>
bits are off by default).
The default output codes for both ADCs are all zeros.
The default modulator output for both ADCs is 0011
(corresponding to a theoretical zero voltage at the
inputs). The default phase is zero between the two
channels.
It is recommended to enter into ADC reset mode for
both ADCs just after power-up because the desired
MCP3901 register configuration may not be the default
one and in this case, the ADC would output undesired
data. Within the ADC reset mode (RESET<1:0>=11),
the user can configure the whole part with a single
communication. The write commands increment
automatically the address so that the user can start
writing the PHASE register and finish with the
CONFIG2 register in only one communication (see
Figure
register to allow to exit the soft reset mode and have
the whole part configured and ready to run in only one
command.
FIGURE 6-7:
DS22192B-page 36
AV
CS
SCK
SDI
DD
6-6). The RESET<1:0> bits are in the CONFIG2
CONFIG2 ADDR/W
CONTINUOUS WRITE
Optional RESET of both ADCs
00011000
Recommended Configuration Sequence at Power Up.
11XXXXXX
CONFIG2
PHASE ADDR/W
00001110
xxxxxxxx
PHASE
One command for writing complete configuration
The following register sets are defined as groups:
TABLE 6-1:
The following register sets are defined as types:
TABLE 6-2:
6.8
Immediately after the following actions, the ADCs are
temporarily reset in order to provide proper operation:
1.
2.
3.
4.
5.
After these temporary resets, the ADCs go back to the
normal operation with no need for an additional
command. These are also the settings where the DR
position is affected. The PHASE register can be used
to serially soft reset the ADCs without using the RESET
bits in the configuration register if the same value is
written in the PHASE register.
ADC DATA CH0
ADC DATA CH1
MOD, PHASE, GAIN
CONFIG, STATUS
ADC DATA
(Both Channels)
CONFIGURATION
xxxxxxxx
Change in PHASE register.
Change in the OSR setting.
Change in the PRESCALE setting.
Overwrite of same PHASE register value.
Change in CLKEXT bit in the CONFIG2 register
modifying internal oscillator state.
GAIN
GROUP
Situations that Reset ADC Data
TYPE
STATUS/COM
xxxxxxxx
REGISTER GROUPS
REGISTER TYPES
© 2009 Microchip Technology Inc.
xxxxxxxx
CONFIG1
ADDRESSES
ADDRESSES
0x00 - 0x05
0x06 - 0x0B
0x09 - 0x0B
0x00 - 0x02
0x03 - 0x05
0x06 - 0x08
CONFIG2
xxxxxxxx