KSZ8993M-EVAL Micrel Inc, KSZ8993M-EVAL Datasheet - Page 16

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KSZ8993M-EVAL

Manufacturer Part Number
KSZ8993M-EVAL
Description
KSZ8993M Evaluation Board - For Experimental Use Only
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8993M-EVAL

Lead Free Status / RoHS Status
Supplier Unconfirmed
Micrel, Inc.
October 2008
Note:
1. I = Input.
Pin Number
100
101
102
103
O= Output.
Pin Name
PS1
PS0
PV31
PV32
Ipu = Input w/ internal pull-up.
Ipd = Input w/ internal pull-down.
Type
Ipd
Ipd
Ipu
Ipu
(1)
16
Description
Serial bus configuration pins to select mode of access to
KSZ8993M internal registers.
[PS1, PS0] = [0, 0] — I
(If EEPROM is not detected, the power-up default values of
the KSZ8993M internal registers will be used.)
[PS1, PS0] = [0, 1] — I
The external I
The KSZ8993M device addresses are:
1011_1111
1011_1110
[PS1, PS0] = [1, 0] — SPI slave mode
[PS1, PS0] = [1, 1] – SMI-mode
In this mode, the KSZ8993M provides access to all its internal
8 bit registers through its MDC and MDIO pins.
Note:
When (PS1, PS0) ≠ (1,1), the KSZ8993M provides access to
its 16 bit MIIM registers through its MDC and MDIO pins.
Port 3 port-based VLAN mask bits – Use to select which
ports may transmit packets received on port 3.
PV31 = 1, port 1 may transmit packets received on port 3
PV31 = 0, port 1 will not transmit any packets received on
port 3
PV32 = 1, port 2 may transmit packets received on port 3
PV32 = 0, port 2 will not transmit any packets received on
port 3
I/O = Bi-directional.
Interface Signals
SPIQ
SCL
SDA
SPIS_N
Interface Signals
SPIQ
SCL
SDA
SPIS_N
Interface Signals
SPIQ
SCL
SDA
SPIS_N
2
<read>
<write>
C master will drive the SCL clock.
Type
O
O
I/O
Ipu
Type
O
I
I/O
Ipu
Type
O
I
I
Ipu
2
2
C master (EEPROM) mode
C slave mode
Description
Not used (tri-stated)
I
I
Not used
Description
Not used (tri-stated)
I
I
Not used
Description
SPI data out
SPI clock
SPI data In
SPI chip select
2
2
2
2
C clock
C data I/O
C clock
C data I/O
M9999-020606
KSZ8993M/ML

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