KSZ8851-16MLLI Micrel Inc, KSZ8851-16MLLI Datasheet - Page 14
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KSZ8851-16MLLI
Manufacturer Part Number
KSZ8851-16MLLI
Description
10/100BT Ethernet MAC + PHY With Generic (8, 16-bit) Bus Interface (I-Temp)
Manufacturer
Micrel Inc
Specifications of KSZ8851-16MLLI
Controller Type
Ethernet Controller, MAC/PHY
Interface
Bus
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP, 48-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-3505
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8851-16MLLI
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Company:
Part Number:
KSZ8851-16MLLI TR
Manufacturer:
Kendin
Quantity:
225
Company:
Part Number:
KSZ8851-16MLLI TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Functional Description
The KSZ8851-16MLL is a single-chip Fast Ethernet MAC/PHY controller consisting of a 10/100 physical layer transceiver
(PHY), a MAC, and a Bus Interface Unit (BIU) that controls the KSZ8851-16MLL via an 8-bit or 16-bit host bus interface.
The KSZ8851-16MLL is fully compliant to IEEE802.3u standards.
Functional Overview
Power Management
The KSZ8851-16MLL supports enhanced power management feature in low power state with energy detection to ensure
low-power dissipation during device idle periods. There are four operation modes under the power management function
which is controlled by two bits in PMECR (0xD4) register as shown below:
PMECR[1:0] = 00 Normal Operation Mode
PMECR[1:0] = 01 Energy Detect Mode
PMECR[1:0] = 10 Soft Power Down Mode
PMECR[1:0] = 11 Power Saving Mode
Table 1 indicates all internal function blocks status under four different power management operation modes.
Normal Operation Mode
This is the default setting bit[1:0]=00 in PMECR register after the chip power-up or hardware reset (pin 67). When
KSZ8851-16MLL is in this normal operation mode, all PLL clocks are running, PHY and MAC are on and the host
interface is ready for CPU read or write.
During the normal operation mode, the host CPU can set the bit[1:0] in PMECR register to transit the current normal
operation mode to any one of the other three power management operation modes.
Energy Detect Mode
The energy detect mode provides a mechanism to save more power than in the normal operation mode when the
KSZ8851-16MLL is not connected to an active link partner. For example, if cable is not present or it is connected to a
powered down partner, the KSZ8851-16MLL can automatically enter to the low power state in energy detect mode. Once
activity resumes due to plugging a cable or attempting by the far end to establish link, the KSZ8851-16MLL can
automatically power up to normal power state in energy detect mode.
Energy detect mode consists of two states, normal power state and low power state. While in low power state, the
KSZ8851-16MLL reduces power consumption by disabling all circuitry except the energy detect circuitry of the receiver.
The energy detect mode is entered by setting bit[1:0]=01 in PMECR register. When the KSZ8851-16MLL is in this mode, it
will monitor the cable energy. If there is no energy on the cable for a time longer than pre-configured value at bit[7:0] Go-
Sleep time in GSWUTR register, KSZ8851-16MLL will go into a low power state. When KSZ8851-16MLL is in low power
state, it will keep monitoring the cable energy. Once the energy is detected from the cable and is continuously presented
for a time longer than pre-configured value at bit[15:8] Wake-Up time in GSWUTR register, the KSZ8851-16MLL will enter
either the normal power state if the auto-wakeup enable bit[7] is set in PMECR register or the normal operation mode if
both auto-wakeup enable bit[7] and wakeup to normal operation mode bit[6] are set in PMECR register.
The KSZ8851-16MLL will also assert PME output pin if the corresponding enable bit[8] is set in PMECR (0xD4) register or
August 2009
Micrel, Inc.
Internal PLL Clock
Function Blocks
KSZ8851-16MLL
Host Interface
Tx/Rx PHY
MAC
Normal Mode
Enabled
Enabled
Enabled
Enabled
Table 1. Internal Function Blocks Status
Rx unused block disabled
Power Saving Mode
Enabled
Enabled
Enabled
Power Management Operation Modes
14
Energy Detect Mode
Energy detect at Rx
Disabled
Disabled
Disabled
Soft Power Down Mode
KSZ8851-16MLL/MLLI
Disabled
Disabled
Disabled
Disabled
M9999-083109-2.0