KSZ8841-PMQL Micrel Inc, KSZ8841-PMQL Datasheet - Page 5

• Manufacturer Part Number: KSZ8841-PMQL
• Description: Single Ethernet Port + 32-bit/33MHz PCI Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8841-PMQL

• Controller Type: Ethernet Controller, MAC
• Interface: Bus
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1633 - BOARD EVALUATION KSZ8841-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-2117; KSZ8841-PMQL

Wake-up Event of Power Management
Wake Events
If the device detects a wake event while in WoL mode, it will assert the PMEN pin low to signal to the system that a wake
event has occurred.
The KSZ8841-PMQL supports the wake-up events of power management states specified by PCI power management
specifications D0, D1, D2 and D3 hot states. Those states are described as follows.
D0 State
The D0 state is the normal operational state of the device
D1 State
The D1 state is the least power-saving Power Management state and may not be used by the operating system. The
system will only respond to PCI configuration transactions and therefore will not transmit data. The device can initiate the
assertion of the PMEN pin (assuming the PME Enable bit is set to 1) in D1 state. Upon returning to the D0 state, the
system must re-enable I/O and memory space and turn on bus master capability.
D2 State
The D2 state has the same features as the D1 state, and the system may turn off the PCI clock, further reducing power.
Like the D1 state, the D2 state might not be used by the operating system.
D3hot State
The D3hot state is often known as the Standby state. Similar to the D2 and D1 states, the system in D3hot state will
respond to PCI configuration transactions as long as the PCI clock is running.
When the system exits the D3hot state, all PCI configuration registers except for the PME Enable and PME Status bits are
reset to their default values. This means the operating system must reinitialize the system's PCI configuration registers.
How to Configure and Apply the Wake-up Event of Power Management
The following steps are required to support the KSZ8841-PMQL into wake-up in power management mode:
All Involved Control Registers and bits are shown in Table 4.
Micrel, Inc.
Register
PMCR
May 2007
1. Program the ConfigParam field in the EEPROM. Set PME_D2 bit 12, PME_D1 bit 11, D2_ SUP bit 10 and D2_
2. Enable PME_Enable bit 8 in Power Management Control and Status Register CPMC.
3. CPU can control and write the Power Management Control and Status Register CPMC bit [1-0] to set current
SUP bit 9, these values of bits will be loaded to PMCR and CCID registers (those registers are read only) when
power up or reset KSZ8841-PMQL device.
power states of system. If the power states are D1, D2 and D3 (hot), then the PMEN pin will be asserted for
wake-up event of power management for the different power states.
Bit
14
13
12
10
Name
PME Support
D3 (hot)
PME Support
D2
PME Support
D1
D2 Support
Description
This bit is 1 only, it is indicating that the KSZ8841-PMQL can assert PME event
(PMEN pin 14) in D3 (hot) power state.
If this bit is set, the KSZ8841-PMQL asserts PME event (PMEN pin 14) when the
KSZ8841 is in D2 power state and PME_EN (see bit8 in PMCS register) is set.
Otherwise, the KSZ8841-PMQL does not assert PME event (PMEN pin 14) when
the KSZ8841-PMQL is in D2 power state.
The value of this bit is loaded from the PME_D2 bit in the EEPROM 0x6 word.
If this bit is set, the KSZ8841-PMQL asserts PME event (PMEN pin 14) when the
KSZ8841-PMQL is in D1 power state and PME_EN (see bit8 in PMCS register) is
set. Otherwise, the KSZ8841PMQL does not assert PME event (PMEN pin 14)
when the KSZ8841PMQL is in D1 power state.
The value of this bit loaded from the PME_D1 bit in the EEPROM 0x6 word.
If this bit is set, it indicates that the KSZ8841-PMQL support D2 power state. The
value of this bit is loaded from the D2_SUP bit in the EEPROM 0x6 word. (This bit
is 0 only if without EEPROM).
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Application Note 142
M9999-050807-A
Default
1
0
0
0