EPM570GT100I5N Altera, EPM570GT100I5N Datasheet - Page 25

• Manufacturer Part Number: EPM570GT100I5N
• Description: MAX II
• Manufacturer: Altera

Specifications of EPM570GT100I5N

• Family Name: MAX II
• Memory Type: Flash
• # Macrocells: 440
• Frequency (max): 1.8797GHz
• Propagation Delay Time: 8.7ns
• Number Of Logic Blocks/elements: 57
• # I/os (max): 76
• Operating Supply Voltage (typ): 1.8V
• In System Programmable: Yes
• Operating Supply Voltage (min): 1.71V
• Operating Supply Voltage (max): 1.89V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP
• Lead Free Status / Rohs Status: Compliant

Chapter 2: MAX II Architecture
Global Signals
© October 2008 Altera Corporation
Figure 2–13. Global Clock Generation
Note to
(1) Any I/O pin can use a MultiTrack interconnect to route as a logic array-generated global clock signal.
The global clock network drives to individual LAB column signals, LAB column
clocks [3..0], that span an entire LAB column from the top to the bottom of the device.
Unused global clocks or control signals in a LAB column are turned off at the LAB
column clock buffers shown in
multiplexed down to two LAB clock signals and one LAB clear signal. Other control
signal types route from the global clock network into the LAB local interconnect. See
“LAB Control Signals” on page 2–5
Figure 2–13
:
Logic Array(1)
GCLK0
GCLK1
GCLK2
GCLK3
Figure
for more information.
4
2–14. The LAB column clocks [3..0] are
4
Global Clock
Network
MAX II Device Handbook
2–17