EPF10K30ETC144-2 Altera, EPF10K30ETC144-2 Datasheet - Page 3

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EPF10K30ETC144-2

Manufacturer Part Number
EPF10K30ETC144-2
Description
FLEX 10KE
Manufacturer
Altera

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Low-Cost Configuration Devices
To offer the lowest total solution cost, Altera created a
low-cost serial configuration device family for the Cyclone
series. On average, these serial configuration devices are
priced for volume applications at as low as 10 percent the
price of the corresponding Cyclone series device. Four serial
configuration devices (1 Mbit, 4 Mbit, 16 Mbit, and 64 Mbit)
are offered in space-saving 8-pin and 16-pin small-outline
integrated circuit (SOIC) packages for the Cyclone series. To
add even more value, any unused memory in these devices
can be used for general-purpose storage, such as storing the
software code for Nios II embedded processors.
Design Software
Cyclone and Cyclone II devices are also supported in
Altera’s flagship Quartus II software, the industry’s most
advanced development software. Quartus II software provides
Altera Corporation
Table 2. Cyclone II Device Highlights
Feature
Embedded Memory
Embedded 18x18 Multipliers
I/O Standard Support
External Memory
Interfaces
Clock Management
Circuitry
Nios II Embedded Processors
Intellectual Property (IP)
Serial Configuration Devices
Cyclone series designs can be developed
from concept to configuration using the
free Quartus
available from the Altera web site.
The Cyclone II M4K embedded memory structure consists of 4,608 bits per block supporting multiple
configurations, including true dual-port and single-port RAM, ROM, and first-in first-out (FIFO) buffers.
Running at up to 250 MHz, Cyclone II embedded 18x18 multipliers can implement common DSP functions
such as finite impulse response (FIR) filters, fast Fourier transforms (FFTs), and correlators. Each 18x18 mul-
tiplier can be used as two independent 9x9 multipliers. The multipliers eliminate the performance bottleneck
in complex arithmetic calculations and significantly increase overall DSP system throughput.
Cyclone II devices include LVTTL, LVCMOS, PCI, PCI-X, SSTL, and HSTL single-ended I/O standard sup-
port. For differential signaling requirements, Cyclone II devices support LVDS (up to 805 Mbps receiving
and 622 Mbps transmitting), mini-LVDS, RSDS, LVPECL, SSTL, and HSTL system interfaces.
Cyclone II devices have dedicated interfaces to support high-speed memory devices including 167 MHz
(668 Mbps) QDRII SRAM devices. Cyclone II devices also support SDR, DDR, and DDR2 interfaces.
Up to sixteen low-skew, global clock networks span the entire device, fed by sixteen dedicated input
clock pins. PLLs, each with three output taps, feature frequency synthesis and phase-shifting capabilities
for complete system clock management on- and off-chip.
By supporting all Nios II soft processor cores, Cyclone series devices balance performance needs and
device resource use for embedded processing applications.
IP functions that are developed, tested, and licensed by Altera and Altera Megafunction Partners Program
(AMPP
ory controllers, and FFTs.
Altera’s serial configuration device family is designed to deliver the lowest cost configuration solution
in the market. These devices can store configuration data while using remaining resources for general-
purpose storage.
®
II Web Edition software,
SM
) partners can be implemented on Cyclone series devices. Available functions include PCI, mem-
a comprehensive suite of synthesis, optimization, and verifi-
cation tools in a unified design environment. In addition,
designers can select, integrate, and evaluate intellectual
property in Cyclone series designs in minutes within this
easy-to-use software environment.
Figure 1. Cyclone II Floorplan
Support for PCI/PCI-X &
Side I/O Elements with
Embedded Multipliers
M4K Memory Blocks
Memory Interfaces
Benefit
Logic Array
with Support for Memory Interfaces
Top & Bottom I/O Elements
Phase-Locked
Loops
3

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