EP9307-CRZR Cirrus Logic Inc, EP9307-CRZR Datasheet - Page 12

• Manufacturer Part Number: EP9307-CRZR
• Description: IC Universal Platform ARM9 SOC Prcessor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9307-CRZR

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 272-LFBGA
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9307A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: Q5809834A

12
Description 7
The coprocessor can incorrectly update one of its destination accumulators even if the coprocessor
instruction should not have been executed or is canceled by the ARM processor. This error can occur if the
following is true:
1) The first instruction must be a coprocessor compare instruction, one of cfcmp32, cfcmp64, cfcmps, and
2) The second instruction:
Example 1: In this case the second instruction may modify a2 even if the condition is not matched.
Example 2: In this case the second instruction may modify a2 even if an interrupt or exception causes it to
be canceled and re-executed after the interrupt/exception handler returns.
Workaround
The workaround for this issue is to insure that at least one other instruction appears between these
instructions. For example, possible fixes for the instructions sequences above are:
and
Description 8
If a data abort occurs on an instruction preceding a coprocessor data path instruction that writes to one of
the accumulators
For example:
The second instruction will update a0 even though it should be canceled due to the data abort on the
previous instruction.
cfcmp32
cfmva64ne
cfcmp32
cfmadda
cfcmp32
nop
cfmva64ne
cfcmp32
nop
cfmadda
str
cfmadda32
cfcmpd.
- has an accumulator as a destination
- does not execute
3
, the accumulator may be updated even though the instruction was canceled.
r15, c0, c5
a2, c8
r15, c0, c5
a2, a2, c0, c1
r15, c0, c5
a2, c8
r15, c0, c5
a2, a2, c0, c1
1
r7, [r0, #0x1d]
a0, a2, c0, c1
.
(Continued)
3
.
; assume this causes a data abort
ER667E2B